forked from OSchip/llvm-project
[update_mir_test_checks.py] Use -NEXT FileCheck directories
Previously the script emitted output using plain CHECK directives. This can result in a test passing even if there are some instructions between CHECK directives that should have been removed. It also makes debugging tests that have the output in a different order more difficult since FileCheck can match with a later line and then complain about the "wrong" directive not being found. This will cause quite large diffs when updating existing tests, but I'm not sure we need an opt-in flag here. Depends on D109765 (pre-commit tests) Reviewed By: MaskRay Differential Revision: https://reviews.llvm.org/D109767
This commit is contained in:
Alex Richardson
parent
7b68c0725d
commit
817e23d481
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@ -118,24 +118,28 @@ registers:
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body: |
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; ALL-LABEL: name: test_i8
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; ALL: bb.0.entry:
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; ALL: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; ALL: liveins: $edi, $edx, $esi
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; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi
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; ALL: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
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; ALL: [[COPY2:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit
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; ALL: [[COPY3:%[0-9]+]]:gr32 = COPY $edx
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; ALL: [[COPY4:%[0-9]+]]:gr8 = COPY [[COPY3]].sub_8bit
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; ALL: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
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; ALL: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
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; ALL: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
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; ALL: TEST8ri [[SETCCr]], 1, implicit-def $eflags
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; ALL: JCC_1 %bb.2, 5, implicit $eflags
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; ALL: bb.1.cond.false:
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; ALL: successors: %bb.2(0x80000000)
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; ALL: bb.2.cond.end:
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; ALL: [[PHI:%[0-9]+]]:gr8 = PHI [[COPY4]], %bb.1, [[COPY2]], %bb.0
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; ALL: $al = COPY [[PHI]]
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; ALL: RET 0, implicit $al
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; ALL-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; ALL-NEXT: liveins: $edi, $edx, $esi
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
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; ALL-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
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; ALL-NEXT: [[COPY2:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit
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; ALL-NEXT: [[COPY3:%[0-9]+]]:gr32 = COPY $edx
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; ALL-NEXT: [[COPY4:%[0-9]+]]:gr8 = COPY [[COPY3]].sub_8bit
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; ALL-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
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; ALL-NEXT: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
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; ALL-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
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; ALL-NEXT: TEST8ri [[SETCCr]], 1, implicit-def $eflags
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; ALL-NEXT: JCC_1 %bb.2, 5, implicit $eflags
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: bb.1.cond.false:
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; ALL-NEXT: successors: %bb.2(0x80000000)
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: bb.2.cond.end:
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; ALL-NEXT: [[PHI:%[0-9]+]]:gr8 = PHI [[COPY4]], %bb.1, [[COPY2]], %bb.0
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; ALL-NEXT: $al = COPY [[PHI]]
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; ALL-NEXT: RET 0, implicit $al
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bb.1.entry:
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successors: %bb.3(0x40000000), %bb.2(0x40000000)
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liveins: $edi, $edx, $esi
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@ -178,24 +182,28 @@ registers:
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body: |
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; ALL-LABEL: name: test_i16
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; ALL: bb.0.entry:
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; ALL: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; ALL: liveins: $edi, $edx, $esi
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; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi
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; ALL: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
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; ALL: [[COPY2:%[0-9]+]]:gr16 = COPY [[COPY1]].sub_16bit
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; ALL: [[COPY3:%[0-9]+]]:gr32 = COPY $edx
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; ALL: [[COPY4:%[0-9]+]]:gr16 = COPY [[COPY3]].sub_16bit
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; ALL: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
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; ALL: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
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; ALL: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
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; ALL: TEST8ri [[SETCCr]], 1, implicit-def $eflags
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; ALL: JCC_1 %bb.2, 5, implicit $eflags
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; ALL: bb.1.cond.false:
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; ALL: successors: %bb.2(0x80000000)
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; ALL: bb.2.cond.end:
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; ALL: [[PHI:%[0-9]+]]:gr16 = PHI [[COPY4]], %bb.1, [[COPY2]], %bb.0
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; ALL: $ax = COPY [[PHI]]
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; ALL: RET 0, implicit $ax
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; ALL-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; ALL-NEXT: liveins: $edi, $edx, $esi
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
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; ALL-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
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; ALL-NEXT: [[COPY2:%[0-9]+]]:gr16 = COPY [[COPY1]].sub_16bit
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; ALL-NEXT: [[COPY3:%[0-9]+]]:gr32 = COPY $edx
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; ALL-NEXT: [[COPY4:%[0-9]+]]:gr16 = COPY [[COPY3]].sub_16bit
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; ALL-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
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; ALL-NEXT: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
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; ALL-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
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; ALL-NEXT: TEST8ri [[SETCCr]], 1, implicit-def $eflags
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; ALL-NEXT: JCC_1 %bb.2, 5, implicit $eflags
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: bb.1.cond.false:
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; ALL-NEXT: successors: %bb.2(0x80000000)
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: bb.2.cond.end:
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; ALL-NEXT: [[PHI:%[0-9]+]]:gr16 = PHI [[COPY4]], %bb.1, [[COPY2]], %bb.0
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; ALL-NEXT: $ax = COPY [[PHI]]
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; ALL-NEXT: RET 0, implicit $ax
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bb.1.entry:
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successors: %bb.3(0x40000000), %bb.2(0x40000000)
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liveins: $edi, $edx, $esi
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@ -237,26 +245,32 @@ registers:
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body: |
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; ALL-LABEL: name: test_i32
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; ALL: bb.0.entry:
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; ALL: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; ALL: liveins: $edi, $edx, $esi
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; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi
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; ALL: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
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; ALL: [[COPY2:%[0-9]+]]:gr32 = COPY $edx
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; ALL: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
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; ALL: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
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; ALL: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
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; ALL: TEST8ri [[SETCCr]], 1, implicit-def $eflags
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; ALL: JCC_1 %bb.1, 5, implicit $eflags
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; ALL: JMP_1 %bb.2
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; ALL: bb.1.cond.true:
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; ALL: successors: %bb.3(0x80000000)
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; ALL: JMP_1 %bb.3
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; ALL: bb.2.cond.false:
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; ALL: successors: %bb.3(0x80000000)
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; ALL: bb.3.cond.end:
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; ALL: [[PHI:%[0-9]+]]:gr32 = PHI [[COPY1]], %bb.1, [[COPY2]], %bb.2
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; ALL: $eax = COPY [[PHI]]
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; ALL: RET 0, implicit $eax
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; ALL-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; ALL-NEXT: liveins: $edi, $edx, $esi
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
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; ALL-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
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; ALL-NEXT: [[COPY2:%[0-9]+]]:gr32 = COPY $edx
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; ALL-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
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; ALL-NEXT: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
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; ALL-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
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; ALL-NEXT: TEST8ri [[SETCCr]], 1, implicit-def $eflags
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; ALL-NEXT: JCC_1 %bb.1, 5, implicit $eflags
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; ALL-NEXT: JMP_1 %bb.2
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: bb.1.cond.true:
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; ALL-NEXT: successors: %bb.3(0x80000000)
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: JMP_1 %bb.3
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: bb.2.cond.false:
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; ALL-NEXT: successors: %bb.3(0x80000000)
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: bb.3.cond.end:
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; ALL-NEXT: [[PHI:%[0-9]+]]:gr32 = PHI [[COPY1]], %bb.1, [[COPY2]], %bb.2
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; ALL-NEXT: $eax = COPY [[PHI]]
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; ALL-NEXT: RET 0, implicit $eax
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bb.1.entry:
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successors: %bb.2(0x40000000), %bb.3(0x40000000)
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liveins: $edi, $edx, $esi
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@ -302,26 +316,32 @@ registers:
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body: |
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; ALL-LABEL: name: test_i64
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; ALL: bb.0.entry:
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; ALL: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; ALL: liveins: $edi, $rdx, $rsi
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; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi
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; ALL: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi
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; ALL: [[COPY2:%[0-9]+]]:gr64 = COPY $rdx
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; ALL: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
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; ALL: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
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; ALL: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
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; ALL: TEST8ri [[SETCCr]], 1, implicit-def $eflags
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; ALL: JCC_1 %bb.1, 5, implicit $eflags
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; ALL: JMP_1 %bb.2
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; ALL: bb.1.cond.true:
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; ALL: successors: %bb.3(0x80000000)
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; ALL: JMP_1 %bb.3
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; ALL: bb.2.cond.false:
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; ALL: successors: %bb.3(0x80000000)
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; ALL: bb.3.cond.end:
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; ALL: [[PHI:%[0-9]+]]:gr64 = PHI [[COPY1]], %bb.1, [[COPY2]], %bb.2
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; ALL: $rax = COPY [[PHI]]
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; ALL: RET 0, implicit $rax
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; ALL-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; ALL-NEXT: liveins: $edi, $rdx, $rsi
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
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; ALL-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi
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; ALL-NEXT: [[COPY2:%[0-9]+]]:gr64 = COPY $rdx
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; ALL-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
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; ALL-NEXT: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
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; ALL-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
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; ALL-NEXT: TEST8ri [[SETCCr]], 1, implicit-def $eflags
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; ALL-NEXT: JCC_1 %bb.1, 5, implicit $eflags
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; ALL-NEXT: JMP_1 %bb.2
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: bb.1.cond.true:
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; ALL-NEXT: successors: %bb.3(0x80000000)
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: JMP_1 %bb.3
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: bb.2.cond.false:
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; ALL-NEXT: successors: %bb.3(0x80000000)
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: bb.3.cond.end:
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; ALL-NEXT: [[PHI:%[0-9]+]]:gr64 = PHI [[COPY1]], %bb.1, [[COPY2]], %bb.2
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; ALL-NEXT: $rax = COPY [[PHI]]
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; ALL-NEXT: RET 0, implicit $rax
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bb.1.entry:
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successors: %bb.2(0x40000000), %bb.3(0x40000000)
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liveins: $edi, $rdx, $rsi
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@ -373,25 +393,29 @@ constants:
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body: |
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; ALL-LABEL: name: test_float
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; ALL: bb.0.entry:
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; ALL: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; ALL: liveins: $edi, $xmm0, $xmm1
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; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi
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; ALL: [[COPY1:%[0-9]+]]:vr128 = COPY $xmm0
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; ALL: [[COPY2:%[0-9]+]]:fr32 = COPY [[COPY1]]
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; ALL: [[COPY3:%[0-9]+]]:vr128 = COPY $xmm1
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; ALL: [[COPY4:%[0-9]+]]:fr32 = COPY [[COPY3]]
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; ALL: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
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; ALL: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
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; ALL: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
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; ALL: TEST8ri [[SETCCr]], 1, implicit-def $eflags
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; ALL: JCC_1 %bb.2, 5, implicit $eflags
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; ALL: bb.1.cond.false:
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; ALL: successors: %bb.2(0x80000000)
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; ALL: bb.2.cond.end:
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; ALL: [[PHI:%[0-9]+]]:fr32 = PHI [[COPY4]], %bb.1, [[COPY2]], %bb.0
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; ALL: [[COPY5:%[0-9]+]]:vr128 = COPY [[PHI]]
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; ALL: $xmm0 = COPY [[COPY5]]
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; ALL: RET 0, implicit $xmm0
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; ALL-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; ALL-NEXT: liveins: $edi, $xmm0, $xmm1
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
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; ALL-NEXT: [[COPY1:%[0-9]+]]:vr128 = COPY $xmm0
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; ALL-NEXT: [[COPY2:%[0-9]+]]:fr32 = COPY [[COPY1]]
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; ALL-NEXT: [[COPY3:%[0-9]+]]:vr128 = COPY $xmm1
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; ALL-NEXT: [[COPY4:%[0-9]+]]:fr32 = COPY [[COPY3]]
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; ALL-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
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; ALL-NEXT: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
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; ALL-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
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; ALL-NEXT: TEST8ri [[SETCCr]], 1, implicit-def $eflags
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; ALL-NEXT: JCC_1 %bb.2, 5, implicit $eflags
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: bb.1.cond.false:
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; ALL-NEXT: successors: %bb.2(0x80000000)
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: bb.2.cond.end:
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; ALL-NEXT: [[PHI:%[0-9]+]]:fr32 = PHI [[COPY4]], %bb.1, [[COPY2]], %bb.0
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; ALL-NEXT: [[COPY5:%[0-9]+]]:vr128 = COPY [[PHI]]
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; ALL-NEXT: $xmm0 = COPY [[COPY5]]
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; ALL-NEXT: RET 0, implicit $xmm0
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bb.1.entry:
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successors: %bb.3(0x40000000), %bb.2(0x40000000)
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liveins: $edi, $xmm0, $xmm1
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@ -435,25 +459,29 @@ registers:
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body: |
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; ALL-LABEL: name: test_double
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; ALL: bb.0.entry:
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; ALL: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; ALL: liveins: $edi, $xmm0, $xmm1
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; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi
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; ALL: [[COPY1:%[0-9]+]]:vr128 = COPY $xmm0
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; ALL: [[COPY2:%[0-9]+]]:fr64 = COPY [[COPY1]]
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; ALL: [[COPY3:%[0-9]+]]:vr128 = COPY $xmm1
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; ALL: [[COPY4:%[0-9]+]]:fr64 = COPY [[COPY3]]
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; ALL: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
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; ALL: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
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; ALL: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
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; ALL: TEST8ri [[SETCCr]], 1, implicit-def $eflags
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; ALL: JCC_1 %bb.2, 5, implicit $eflags
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; ALL: bb.1.cond.false:
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; ALL: successors: %bb.2(0x80000000)
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; ALL: bb.2.cond.end:
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; ALL: [[PHI:%[0-9]+]]:fr64 = PHI [[COPY4]], %bb.1, [[COPY2]], %bb.0
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; ALL: [[COPY5:%[0-9]+]]:vr128 = COPY [[PHI]]
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; ALL: $xmm0 = COPY [[COPY5]]
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; ALL: RET 0, implicit $xmm0
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; ALL-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; ALL-NEXT: liveins: $edi, $xmm0, $xmm1
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
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; ALL-NEXT: [[COPY1:%[0-9]+]]:vr128 = COPY $xmm0
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; ALL-NEXT: [[COPY2:%[0-9]+]]:fr64 = COPY [[COPY1]]
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; ALL-NEXT: [[COPY3:%[0-9]+]]:vr128 = COPY $xmm1
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; ALL-NEXT: [[COPY4:%[0-9]+]]:fr64 = COPY [[COPY3]]
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; ALL-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
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; ALL-NEXT: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
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; ALL-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
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; ALL-NEXT: TEST8ri [[SETCCr]], 1, implicit-def $eflags
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; ALL-NEXT: JCC_1 %bb.2, 5, implicit $eflags
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: bb.1.cond.false:
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; ALL-NEXT: successors: %bb.2(0x80000000)
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; ALL-NEXT: {{ $}}
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; ALL-NEXT: {{ $}}
|
||||
; ALL-NEXT: bb.2.cond.end:
|
||||
; ALL-NEXT: [[PHI:%[0-9]+]]:fr64 = PHI [[COPY4]], %bb.1, [[COPY2]], %bb.0
|
||||
; ALL-NEXT: [[COPY5:%[0-9]+]]:vr128 = COPY [[PHI]]
|
||||
; ALL-NEXT: $xmm0 = COPY [[COPY5]]
|
||||
; ALL-NEXT: RET 0, implicit $xmm0
|
||||
bb.1.entry:
|
||||
successors: %bb.3(0x40000000), %bb.2(0x40000000)
|
||||
liveins: $edi, $xmm0, $xmm1
|
||||
|
|
|
|||
|
|
@ -29,20 +29,23 @@ registers:
|
|||
body: |
|
||||
; CHECK-LABEL: name: test
|
||||
; CHECK: bb.0.entry:
|
||||
; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
|
||||
; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
|
||||
; CHECK: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
|
||||
; CHECK: [[MOV32ri:%[0-9]+]]:gr32 = MOV32ri 1
|
||||
; CHECK: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
|
||||
; CHECK: TEST8ri [[COPY1]], 1, implicit-def $eflags
|
||||
; CHECK: JCC_1 %bb.1, 5, implicit $eflags
|
||||
; CHECK: JMP_1 %bb.2
|
||||
; CHECK: bb.1.true:
|
||||
; CHECK: $eax = COPY [[MOV32r0_]]
|
||||
; CHECK: RET 0, implicit $eax
|
||||
; CHECK: bb.2.false:
|
||||
; CHECK: $eax = COPY [[MOV32ri]]
|
||||
; CHECK: RET 0, implicit $eax
|
||||
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
|
||||
; CHECK-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
|
||||
; CHECK-NEXT: [[MOV32ri:%[0-9]+]]:gr32 = MOV32ri 1
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
|
||||
; CHECK-NEXT: TEST8ri [[COPY1]], 1, implicit-def $eflags
|
||||
; CHECK-NEXT: JCC_1 %bb.1, 5, implicit $eflags
|
||||
; CHECK-NEXT: JMP_1 %bb.2
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.1.true:
|
||||
; CHECK-NEXT: $eax = COPY [[MOV32r0_]]
|
||||
; CHECK-NEXT: RET 0, implicit $eax
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.2.false:
|
||||
; CHECK-NEXT: $eax = COPY [[MOV32ri]]
|
||||
; CHECK-NEXT: RET 0, implicit $eax
|
||||
bb.1.entry:
|
||||
successors: %bb.2(0x40000000), %bb.3(0x40000000)
|
||||
liveins: $edi
|
||||
|
|
|
|||
|
|
@ -220,10 +220,13 @@ def add_check_lines(test, output_lines, prefix, func_name, single_bb,
|
|||
check = '{:>{}}; {}'.format('', indent, prefix)
|
||||
|
||||
output_lines.append('{}-LABEL: name: {}'.format(check, func_name))
|
||||
first_check = True
|
||||
|
||||
vreg_map = {}
|
||||
for func_line in func_body:
|
||||
if not func_line.strip():
|
||||
# The mir printer prints leading whitespace so we can't use CHECK-EMPTY:
|
||||
output_lines.append(check + '-NEXT: {{' + func_line + '$}}')
|
||||
continue
|
||||
m = VREG_DEF_RE.match(func_line)
|
||||
if m:
|
||||
|
|
@ -235,7 +238,9 @@ def add_check_lines(test, output_lines, prefix, func_name, single_bb,
|
|||
for number, name in vreg_map.items():
|
||||
func_line = re.sub(r'{}\b'.format(number), '[[{}]]'.format(name),
|
||||
func_line)
|
||||
check_line = '{}: {}'.format(check, func_line[indent:]).rstrip()
|
||||
filecheck_directive = check if first_check else check + '-NEXT'
|
||||
first_check = False
|
||||
check_line = '{}: {}'.format(filecheck_directive, func_line[indent:]).rstrip()
|
||||
output_lines.append(check_line)
|
||||
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue