forked from OSchip/llvm-project
[AMDGPU] Switch to named simm16 in vscnt insertion
Differential Revision: https://reviews.llvm.org/D86568
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2da1eefb58
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@ -1090,8 +1090,8 @@ bool SIInsertWaitcnts::generateWaitcntInstBefore(
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} else {
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assert(II->getOpcode() == AMDGPU::S_WAITCNT_VSCNT);
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assert(II->getOperand(0).getReg() == AMDGPU::SGPR_NULL);
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ScoreBrackets.applyWaitcnt(
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AMDGPU::Waitcnt(~0u, ~0u, ~0u, II->getOperand(1).getImm()));
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auto W = TII->getNamedOperand(*II, AMDGPU::OpName::simm16)->getImm();
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ScoreBrackets.applyWaitcnt(AMDGPU::Waitcnt(~0u, ~0u, ~0u, W));
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}
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}
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}
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@ -1139,12 +1139,13 @@ bool SIInsertWaitcnts::generateWaitcntInstBefore(
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assert(II->getOpcode() == AMDGPU::S_WAITCNT_VSCNT);
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assert(II->getOperand(0).getReg() == AMDGPU::SGPR_NULL);
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unsigned ICnt = II->getOperand(1).getImm();
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unsigned ICnt = TII->getNamedOperand(*II, AMDGPU::OpName::simm16)
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->getImm();
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OldWait.VsCnt = std::min(OldWait.VsCnt, ICnt);
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if (!TrackedWaitcntSet.count(&*II))
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Wait.VsCnt = std::min(Wait.VsCnt, ICnt);
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if (Wait.VsCnt != ICnt) {
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II->getOperand(1).setImm(Wait.VsCnt);
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TII->getNamedOperand(*II, AMDGPU::OpName::simm16)->setImm(Wait.VsCnt);
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Modified = true;
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}
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Wait.VsCnt = ~0u;
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