From 815c635cec733e183b2408af493182a4718e1261 Mon Sep 17 00:00:00 2001 From: Tobias Grosser Date: Mon, 2 Sep 2013 16:13:00 +0000 Subject: [PATCH] [CodeGen] Fixup assert fails caused by incorrect LoopInfo update Contributed-by: Star Tan llvm-svn: 189764 --- polly/lib/CodeGen/CodeGeneration.cpp | 4 +-- polly/test/Cloog/CodeGen/phi_guard.ll | 32 +++++++++++++++++++ ..._guard___%for.preheader---%for.end10.jscop | 28 ++++++++++++++++ 3 files changed, 61 insertions(+), 3 deletions(-) create mode 100644 polly/test/Cloog/CodeGen/phi_guard.ll create mode 100644 polly/test/Cloog/CodeGen/phi_guard___%for.preheader---%for.end10.jscop diff --git a/polly/lib/CodeGen/CodeGeneration.cpp b/polly/lib/CodeGen/CodeGeneration.cpp index ec7b11197b85..77c50a4b5987 100644 --- a/polly/lib/CodeGen/CodeGeneration.cpp +++ b/polly/lib/CodeGen/CodeGeneration.cpp @@ -930,10 +930,8 @@ void ClastStmtCodeGen::codegen(const clast_guard *g) { LoopInfo &LI = P->getAnalysis(); Loop *L = LI.getLoopFor(CondBB); - if (L) { + if (L) L->addBasicBlockToLoop(ThenBB, LI.getBase()); - L->addBasicBlockToLoop(MergeBB, LI.getBase()); - } codegen(g->then); diff --git a/polly/test/Cloog/CodeGen/phi_guard.ll b/polly/test/Cloog/CodeGen/phi_guard.ll new file mode 100644 index 000000000000..242b7a37a3b0 --- /dev/null +++ b/polly/test/Cloog/CodeGen/phi_guard.ll @@ -0,0 +1,32 @@ +; RUN: opt %loadPolly -polly-import-jscop -polly-import-jscop-dir=%S -polly-codegen < %s + +; This test case checks that Polly does not break for PHI guard statement. +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-unknown-linux-gnu" + +define i32 @phi_guard() { +entry: + %acc.reg2mem = alloca i32 + br label %for.preheader + +for.preheader: ; preds = %for.end, %entry + %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %for.end ] + store i32 0, i32* %acc.reg2mem + br label %for.inc + +for.inc: ; preds = %for.inc, %for.preheader + %0 = phi i32 [ 0, %for.preheader ], [ %1, %for.inc ] + %1 = add nsw i32 %0, 1 + store i32 %1, i32* %acc.reg2mem + %exitcond = icmp ne i32 %1, 20 + br i1 %exitcond, label %for.inc, label %for.end + +for.end: ; preds = %for.inc + %indvar.next = add i64 %indvar, 1 + %exitcond4 = icmp ne i64 %indvar.next, 20 + br i1 %exitcond4, label %for.preheader, label %for.end10 + +for.end10: ; preds = %for.end + %res = load i32* %acc.reg2mem, align 4 + ret i32 %res +} diff --git a/polly/test/Cloog/CodeGen/phi_guard___%for.preheader---%for.end10.jscop b/polly/test/Cloog/CodeGen/phi_guard___%for.preheader---%for.end10.jscop new file mode 100644 index 000000000000..9c91a7528320 --- /dev/null +++ b/polly/test/Cloog/CodeGen/phi_guard___%for.preheader---%for.end10.jscop @@ -0,0 +1,28 @@ +{ + "context" : "{ : }", + "name" : "for.preheader => for.end10", + "statements" : [ + { + "accesses" : [ + { + "kind" : "write", + "relation" : "{ Stmt_for_preheader[i0] -> MemRef_acc_reg2mem[0] }" + } + ], + "domain" : "{ Stmt_for_preheader[i0] : i0 >= 0 and i0 <= 19 }", + "name" : "Stmt_for_preheader", + "schedule" : "{ Stmt_for_preheader[i0] -> [o0, o1, i0, 19i0, 0] : exists (e0 = [(o1)/32], e1 = [(o0)/32]: 32e0 = o1 and 32e1 = o0 and o0 <= i0 and o0 >= -31 + i0 and o1 <= 19i0 and o1 >= -31 + 19i0 and i0 >= 0 and i0 <= 19) }" + }, + { + "accesses" : [ + { + "kind" : "write", + "relation" : "{ Stmt_for_inc[i0, i1] -> MemRef_acc_reg2mem[0] }" + } + ], + "domain" : "{ Stmt_for_inc[i0, i1] : i0 >= 0 and i0 <= 19 and i1 >= 0 and i1 <= 19 }", + "name" : "Stmt_for_inc", + "schedule" : "{ Stmt_for_inc[i0, i1] -> [o0, o1, i0, 19i0 + i1, 1] : exists (e0 = [(o1)/32], e1 = [(o0)/32]: 32e0 = o1 and 32e1 = o0 and o0 <= i0 and o0 >= -31 + i0 and o1 <= 19i0 + i1 and o1 >= -31 + 19i0 + i1 and i0 >= 0 and i0 <= 19 and i1 >= 0 and i1 <= 19) }" + } + ] +}