forked from OSchip/llvm-project
[CodeGen] Remove unused forward declarations (NFC)
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732e8968a8
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@ -17,7 +17,6 @@
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namespace llvm {
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class DILocalVariable;
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class DILocation;
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class DINode;
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class MachineFunction;
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@ -18,7 +18,6 @@ namespace llvm {
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class AsmPrinter;
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class MCExpr;
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class raw_ostream;
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class FaultMaps {
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public:
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@ -20,7 +20,6 @@ class GISelChangeObserver;
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class LegalizerInfo;
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class MachineInstr;
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class MachineIRBuilder;
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class MachineRegisterInfo;
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// Contains information relevant to enabling/disabling various combines for a
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// pass.
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@ -15,7 +15,6 @@
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namespace llvm {
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class MachineInstr;
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class MachineFunction;
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// Worklist which mostly works similar to InstCombineWorkList, but on
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// MachineInstrs. The main difference with something like a SetVector is that
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@ -25,7 +25,6 @@
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namespace llvm {
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class MachineRegisterInfo;
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class LostDebugLocObserver;
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class Legalizer : public MachineFunctionPass {
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@ -30,7 +30,6 @@
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namespace llvm {
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// Forward declarations.
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class LegalizerInfo;
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class Legalizer;
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class MachineRegisterInfo;
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class GISelChangeObserver;
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class LostDebugLocObserver;
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@ -38,7 +38,6 @@ class LegalizerHelper;
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class MachineInstr;
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class MachineRegisterInfo;
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class MCInstrInfo;
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class GISelChangeObserver;
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namespace LegalizeActions {
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enum LegalizeAction : std::uint8_t {
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@ -30,7 +30,6 @@
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namespace llvm {
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// Forward declarations.
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class MachineRegisterInfo;
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class TargetTransformInfo;
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namespace GISelAddressing {
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/// Helper struct to store a base, index and offset that forms an address
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struct BaseIndexOffset {
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@ -44,7 +44,6 @@ class TargetLowering;
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class TargetPassConfig;
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class TargetRegisterInfo;
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class TargetRegisterClass;
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class ConstantInt;
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class ConstantFP;
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class APFloat;
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class MachineIRBuilder;
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@ -34,9 +34,7 @@ namespace llvm {
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class AAResults;
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class LiveIntervals;
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class MachineBlockFrequencyInfo;
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class MachineInstr;
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class MachineLoopInfo;
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class MachineOperand;
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class TargetInstrInfo;
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class TargetRegisterInfo;
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@ -10,7 +10,6 @@
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#define LLVM_CODEGEN_MACHINELOOPUTILS_H
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namespace llvm {
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class MachineLoop;
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class MachineBasicBlock;
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class MachineRegisterInfo;
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class TargetInstrInfo;
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@ -44,7 +44,6 @@
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namespace llvm {
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class BasicBlock;
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class CallInst;
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class Function;
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class LLVMTargetMachine;
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class MMIAddrLabelMap;
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@ -30,7 +30,6 @@ class MemoryBuffer;
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class ModulePass;
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class Pass;
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class TargetMachine;
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class TargetRegisterClass;
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class raw_ostream;
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} // End llvm namespace
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@ -26,7 +26,6 @@
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namespace llvm {
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class MachineBasicBlock;
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class MachineBlockFrequencyInfo;
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class MachineBranchProbabilityInfo;
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class MachineFunction;
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class MachineInstr;
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@ -63,7 +63,6 @@
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namespace llvm {
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class BranchProbability;
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class CCState;
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class CCValAssign;
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class Constant;
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