forked from OSchip/llvm-project
[x86] Switch an if which is trivially true to an assert. NFC
llvm-svn: 229669
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@ -8618,26 +8618,26 @@ static SDValue lowerV2I64VectorShuffle(SDValue Op, SDValue V1, SDValue V2,
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DAG.getNode(X86ISD::PSHUFD, SDLoc(Op), MVT::v4i32, V1,
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getV4X86ShuffleImm8ForMask(WidenedMask, DAG)));
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}
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assert((Mask[0] >= 2) + (Mask[1] >= 2) == 1 &&
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"Canonicalization ensures we only see shuffles with two inputs.");
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// Try to use shift instructions.
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if (SDValue Shift =
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lowerVectorShuffleAsShift(DL, MVT::v2i64, V1, V2, Mask, DAG))
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return Shift;
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// If we have a single input from V2 insert that into V1 if we can do so
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// cheaply.
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if ((Mask[0] >= 2) + (Mask[1] >= 2) == 1) {
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if (SDValue Insertion = lowerVectorShuffleAsElementInsertion(
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MVT::v2i64, DL, V1, V2, Mask, Subtarget, DAG))
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return Insertion;
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// Try inverting the insertion since for v2 masks it is easy to do and we
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// can't reliably sort the mask one way or the other.
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int InverseMask[2] = {Mask[0] < 0 ? -1 : (Mask[0] ^ 2),
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Mask[1] < 0 ? -1 : (Mask[1] ^ 2)};
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if (SDValue Insertion = lowerVectorShuffleAsElementInsertion(
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MVT::v2i64, DL, V2, V1, InverseMask, Subtarget, DAG))
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return Insertion;
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}
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// When loading a scalar and then shuffling it into a vector we can often do
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// the insertion cheaply.
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if (SDValue Insertion = lowerVectorShuffleAsElementInsertion(
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MVT::v2i64, DL, V1, V2, Mask, Subtarget, DAG))
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return Insertion;
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// Try inverting the insertion since for v2 masks it is easy to do and we
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// can't reliably sort the mask one way or the other.
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int InverseMask[2] = {Mask[0] < 0 ? -1 : (Mask[0] ^ 2),
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Mask[1] < 0 ? -1 : (Mask[1] ^ 2)};
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if (SDValue Insertion = lowerVectorShuffleAsElementInsertion(
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MVT::v2i64, DL, V2, V1, InverseMask, Subtarget, DAG))
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return Insertion;
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// We have different paths for blend lowering, but they all must use the
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// *exact* same predicate.
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