From 80fe411662656060fe4195ceebc34f3093a0e42a Mon Sep 17 00:00:00 2001 From: Andrew Lenharth Date: Tue, 5 Jul 2005 19:52:39 +0000 Subject: [PATCH] 2 fixes: 1: Legalize operand in UINT_TO_FP expanision 2: SRA x, const i8 was not promoting the constant to shift amount type. llvm-svn: 22337 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 51375c5c8eed..a9721e2e48e7 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -1100,7 +1100,15 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { case ISD::SRL: case ISD::SRA: Tmp1 = LegalizeOp(Node->getOperand(0)); // LHS - Tmp2 = LegalizeOp(Node->getOperand(1)); // RHS + switch (getTypeAction(Node->getOperand(1).getValueType())) { + case Expand: assert(0 && "Not possible"); + case Legal: + Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the RHS. + break; + case Promote: + Tmp2 = PromoteOp(Node->getOperand(1)); // Promote the RHS. + break; + } if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1,Tmp2); @@ -1327,13 +1335,14 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { TLI.getOperationAction(Node->getOpcode(), Node->getOperand(0).getValueType()) == TargetLowering::Expand) { + SDOperand Op0 = LegalizeOp(Node->getOperand(0)); Tmp1 = DAG.getNode(ISD::SINT_TO_FP, Node->getValueType(0), - Node->getOperand(0)); + Op0); SDOperand SignSet = DAG.getSetCC(ISD::SETLT, TLI.getSetCCResultTy(), - Node->getOperand(0), + Op0, DAG.getConstant(0, - Node->getOperand(0).getValueType())); + Op0.getValueType())); SDOperand Zero = getIntPtrConstant(0), Four = getIntPtrConstant(4); SDOperand CstOffset = DAG.getNode(ISD::SELECT, Zero.getValueType(), SignSet, Four, Zero);