forked from OSchip/llvm-project
Rewrite the comments for RegsForValue and its members, and
reorder some of the members for clarity. llvm-svn: 50365
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@ -114,46 +114,56 @@ static void ComputeValueVTs(const TargetLowering &TLI, const Type *Ty,
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}
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namespace {
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/// RegsForValue - This struct represents the physical registers that a
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/// particular value is assigned and the type information about the value.
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/// This is needed because values can be promoted into larger registers and
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/// expanded into multiple smaller registers than the value.
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/// RegsForValue - This struct represents the registers (physical or virtual)
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/// that a particular set of values is assigned, and the type information about
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/// the value. The most common situation is to represent one value at a time,
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/// but struct or array values are handled element-wise as multiple values.
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/// The splitting of aggregates is performed recursively, so that we never
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/// have aggregate-typed registers. The values at this point do not necessarily
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/// have legal types, so each value may require one or more registers of some
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/// legal type.
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///
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struct VISIBILITY_HIDDEN RegsForValue {
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/// TLI - The TargetLowering object.
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///
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const TargetLowering *TLI;
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/// Regs - This list holds the register (for legal and promoted values)
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/// or register set (for expanded values) that the value should be assigned
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/// to.
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SmallVector<unsigned, 4> Regs;
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/// ValueVTs - The value types of the values, which may not be legal, and
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/// may need be promoted or synthesized from one or more registers.
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///
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SmallVector<MVT::ValueType, 4> ValueVTs;
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/// RegVTs - The value types of the registers. This is the same size
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/// as ValueVTs; every register contributing to a given value must
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/// have the same type. When Regs contains all virtual registers, the
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/// contents of RegVTs is redundant with TLI's getRegisterType member
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/// function, however when Regs contains physical registers, it is
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/// necessary to have a separate record of the types.
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/// RegVTs - The value types of the registers. This is the same size as
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/// ValueVTs and it records, for each value, what the type of the assigned
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/// register or registers are. (Individual values are never synthesized
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/// from more than one type of register.)
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///
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/// With virtual registers, the contents of RegVTs is redundant with TLI's
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/// getRegisterType member function, however when with physical registers
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/// it is necessary to have a separate record of the types.
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///
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SmallVector<MVT::ValueType, 4> RegVTs;
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/// ValueVTs - The value types of the values, which may be promoted
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/// or synthesized from one or more registers.
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SmallVector<MVT::ValueType, 4> ValueVTs;
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/// Regs - This list holds the registers assigned to the values.
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/// Each legal or promoted value requires one register, and each
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/// expanded value requires multiple registers.
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///
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SmallVector<unsigned, 4> Regs;
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RegsForValue() : TLI(0) {}
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RegsForValue(const TargetLowering &tli,
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unsigned Reg, MVT::ValueType regvt, MVT::ValueType valuevt)
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: TLI(&tli), Regs(1, Reg), RegVTs(1, regvt), ValueVTs(1, valuevt) {}
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: TLI(&tli), ValueVTs(1, valuevt), RegVTs(1, regvt), Regs(1, Reg) {}
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RegsForValue(const TargetLowering &tli,
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const SmallVector<unsigned, 4> ®s,
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MVT::ValueType regvt, MVT::ValueType valuevt)
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: TLI(&tli), Regs(regs), RegVTs(1, regvt), ValueVTs(1, valuevt) {}
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: TLI(&tli), ValueVTs(1, valuevt), RegVTs(1, regvt), Regs(regs) {}
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RegsForValue(const TargetLowering &tli,
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const SmallVector<unsigned, 4> ®s,
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const SmallVector<MVT::ValueType, 4> ®vts,
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const SmallVector<MVT::ValueType, 4> &valuevts)
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: TLI(&tli), Regs(regs), RegVTs(regvts), ValueVTs(valuevts) {}
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: TLI(&tli), ValueVTs(valuevts), RegVTs(regvts), Regs(regs) {}
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RegsForValue(const TargetLowering &tli,
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unsigned Reg, const Type *Ty) : TLI(&tli) {
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ComputeValueVTs(tli, Ty, ValueVTs);
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