From 80b85a46db58dafd6957a09dcd24a146f473e8b7 Mon Sep 17 00:00:00 2001
From: Sanjay Patel <spatel@rotateright.com>
Date: Fri, 22 Jun 2018 22:07:26 +0000
Subject: [PATCH] [x86] add more tests for bit hacking opportunities with
 setcc; NFC

Missed cases where the input and output are the same size in rL335391.

llvm-svn: 335396
---
 llvm/test/CodeGen/X86/bool-math.ll | 56 ++++++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/llvm/test/CodeGen/X86/bool-math.ll b/llvm/test/CodeGen/X86/bool-math.ll
index 9095dd44298f..660935297c64 100644
--- a/llvm/test/CodeGen/X86/bool-math.ll
+++ b/llvm/test/CodeGen/X86/bool-math.ll
@@ -1,6 +1,21 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
 
+define i32 @sub_zext_cmp_mask_same_size_result(i32 %x) {
+; CHECK-LABEL: sub_zext_cmp_mask_same_size_result:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    andl $1, %edi
+; CHECK-NEXT:    cmpl $1, %edi
+; CHECK-NEXT:    movl $-27, %eax
+; CHECK-NEXT:    sbbl $0, %eax
+; CHECK-NEXT:    retq
+  %a = and i32 %x, 1
+  %c = icmp eq i32 %a, 0
+  %z = zext i1 %c to i32
+  %r = sub i32 -27, %z
+  ret i32 %r
+}
+
 define i32 @sub_zext_cmp_mask_wider_result(i8 %x) {
 ; CHECK-LABEL: sub_zext_cmp_mask_wider_result:
 ; CHECK:       # %bb.0:
@@ -31,6 +46,20 @@ define i8 @sub_zext_cmp_mask_narrower_result(i32 %x) {
   ret i8 %r
 }
 
+define i8 @add_zext_cmp_mask_same_size_result(i8 %x) {
+; CHECK-LABEL: add_zext_cmp_mask_same_size_result:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    testb $1, %dil
+; CHECK-NEXT:    sete %al
+; CHECK-NEXT:    orb $26, %al
+; CHECK-NEXT:    retq
+  %a = and i8 %x, 1
+  %c = icmp eq i8 %a, 0
+  %z = zext i1 %c to i8
+  %r = add i8 %z, 26
+  ret i8 %r
+}
+
 define i32 @add_zext_cmp_mask_wider_result(i8 %x) {
 ; CHECK-LABEL: add_zext_cmp_mask_wider_result:
 ; CHECK:       # %bb.0:
@@ -60,6 +89,20 @@ define i8 @add_zext_cmp_mask_narrower_result(i32 %x) {
   ret i8 %r
 }
 
+define i32 @low_bit_select_constants_bigger_false_same_size_result(i32 %x) {
+; CHECK-LABEL: low_bit_select_constants_bigger_false_same_size_result:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    andl $1, %edi
+; CHECK-NEXT:    cmpl $1, %edi
+; CHECK-NEXT:    movl $43, %eax
+; CHECK-NEXT:    sbbl $0, %eax
+; CHECK-NEXT:    retq
+  %a = and i32 %x, 1
+  %c = icmp eq i32 %a, 0
+  %r = select i1 %c, i32 42, i32 43
+  ret i32 %r
+}
+
 define i64 @low_bit_select_constants_bigger_false_wider_result(i32 %x) {
 ; CHECK-LABEL: low_bit_select_constants_bigger_false_wider_result:
 ; CHECK:       # %bb.0:
@@ -88,6 +131,19 @@ define i16 @low_bit_select_constants_bigger_false_narrower_result(i32 %x) {
   ret i16 %r
 }
 
+define i8 @low_bit_select_constants_bigger_true_same_size_result(i8 %x) {
+; CHECK-LABEL: low_bit_select_constants_bigger_true_same_size_result:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    testb $1, %dil
+; CHECK-NEXT:    sete %al
+; CHECK-NEXT:    orb $-30, %al
+; CHECK-NEXT:    retq
+  %a = and i8 %x, 1
+  %c = icmp eq i8 %a, 0
+  %r = select i1 %c, i8 227, i8 226
+  ret i8 %r
+}
+
 define i32 @low_bit_select_constants_bigger_true_wider_result(i8 %x) {
 ; CHECK-LABEL: low_bit_select_constants_bigger_true_wider_result:
 ; CHECK:       # %bb.0: