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Added documentation for SizeMultiplier in the ARM subtarget hook for register coalescing. Also fixed some 80 col violations. 

No functional code changes.

llvm-svn: 213169
This commit is contained in:
Chris Bieneman 2014-07-16 16:27:31 +00:00
parent 3e037d98e6
commit 80a866a316
1 changed files with 11 additions and 2 deletions
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13
llvm/lib/Target/ARM/ARMSubtarget.cpp
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@ -476,8 +476,17 @@ bool ARMSubtarget::shouldCoalesce(MachineInstr *MI,
auto AFI = MF->getInfo<ARMFunctionInfo>();
auto It = AFI->getCoalescedWeight(MBB);
DEBUG(dbgs() << "\tARM::shouldCoalesce - Coalesced Weight: " << It->second << "\n");
DEBUG(dbgs() << "\tARM::shouldCoalesce - Reg Weight: " << NewRCWeight.RegWeight << "\n");
DEBUG(dbgs() << "\tARM::shouldCoalesce - Coalesced Weight: "
<< It->second << "\n");
DEBUG(dbgs() << "\tARM::shouldCoalesce - Reg Weight: "
<< NewRCWeight.RegWeight << "\n");
// This number is the largest round number that which meets the criteria:
// (1) addresses PR18825
// (2) generates better code in some test cases (like vldm-shed-a9.ll)
// (3) Doesn't regress any test cases (in-tree, test-suite, and SPEC)
// In practice the SizeMultiplier will only factor in for straight line code
// that uses a lot of NEON vectors, which isn't terribly common.
unsigned SizeMultiplier = MBB->size()/100;
SizeMultiplier = SizeMultiplier ? SizeMultiplier : 1;
if (It->second < NewRCWeight.WeightLimit * SizeMultiplier) {