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Moving options declarations around. 

More short term hackery until we have a way to configure passes that work on LiveIntervals.

llvm-svn: 148289
This commit is contained in:
Andrew Trick 2012-01-17 06:54:59 +00:00
parent 12728f04ca
commit 8093eac51d
4 changed files with 7 additions and 14 deletions
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4
llvm/include/llvm/Target/TargetOptions.h
View File

@ -34,10 +34,6 @@ namespace llvm {
/// wth earlier copy coalescing.
extern bool StrongPHIElim;
/// EnableMachineSched - temporary flag to enable the machine scheduling pass
/// until we complete the register allocation pass configuration cleanup.
extern bool EnableMachineSched;
class TargetOptions {
public:
TargetOptions()

2
llvm/lib/CodeGen/RegAllocBasic.cpp
View File

@ -149,8 +149,6 @@ void RABasic::getAnalysisUsage(AnalysisUsage &AU) const {
if (StrongPHIElim)
AU.addRequiredID(StrongPHIEliminationID);
AU.addRequiredTransitiveID(RegisterCoalescerPassID);
if (EnableMachineSched)
AU.addRequiredID(MachineSchedulerPassID);
AU.addRequired<CalculateSpillWeights>();
AU.addRequired<LiveStacks>();
AU.addPreserved<LiveStacks>();

7
llvm/lib/CodeGen/RegAllocGreedy.cpp
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@ -51,6 +51,13 @@ STATISTIC(NumGlobalSplits, "Number of split global live ranges");
STATISTIC(NumLocalSplits, "Number of split local live ranges");
STATISTIC(NumEvicted, "Number of interferences evicted");
/// EnableMachineSched - temporary flag to enable the machine scheduling pass
/// until we complete the register allocation pass configuration cleanup.
static cl::opt<bool>
EnableMachineSched("enable-misched",
cl::desc("Enable the machine instruction scheduling pass."),
cl::init(false), cl::Hidden);
static cl::opt<SplitEditor::ComplementSpillMode>
SplitSpillMode("split-spill-mode", cl::Hidden,
cl::desc("Spill mode for splitting live ranges"),

8
llvm/lib/Target/TargetMachine.cpp
View File

@ -37,14 +37,6 @@ FunctionSections("ffunction-sections",
cl::desc("Emit functions into separate sections"),
cl::init(false));
/// EnableMachineSched - temporary flag to enable the machine scheduling pass
/// until we complete the register allocation pass configuration cleanup.
static cl::opt<bool, true>
MachineSchedOpt("enable-misched",
cl::desc("Enable the machine instruction scheduling pass."),
cl::location(EnableMachineSched),
cl::init(false), cl::Hidden);
//---------------------------------------------------------------------------
// TargetMachine Class
//