From 805c157e8aeee24adec897bed42662733eb0d710 Mon Sep 17 00:00:00 2001 From: Guillaume Chatelet Date: Tue, 21 Jan 2020 15:00:04 +0100 Subject: [PATCH] [Alignment][NFC] Deprecate Align::None() Summary: This is a follow up on https://reviews.llvm.org/D71473#inline-647262. There's a caveat here that `Align(1)` relies on the compiler understanding of `Log2_64` implementation to produce good code. One could use `Align()` as a replacement but I believe it is less clear that the alignment is one in that case. Reviewers: xbolva00, courbet, bollu Subscribers: arsenm, dylanmckay, sdardis, nemanjai, jvesely, nhaehnle, hiraditya, kbarton, jrtc27, atanasyan, jsji, Jim, kerbowa, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D73099 --- clang/lib/CodeGen/CGBuiltin.cpp | 12 ++-- clang/lib/CodeGen/CGObjCMac.cpp | 2 +- llvm/include/llvm/CodeGen/AsmPrinter.h | 2 +- .../llvm/CodeGen/TargetFrameLowering.h | 2 +- llvm/include/llvm/CodeGen/TargetLowering.h | 2 +- llvm/include/llvm/Support/Alignment.h | 16 +++-- llvm/lib/Analysis/Loads.cpp | 2 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 4 +- llvm/lib/CodeGen/GlobalISel/CallLowering.cpp | 4 +- llvm/lib/CodeGen/MIRPrinter.cpp | 2 +- llvm/lib/CodeGen/MachineBasicBlock.cpp | 2 +- llvm/lib/CodeGen/MachineFrameInfo.cpp | 4 +- llvm/lib/CodeGen/MachineOperand.cpp | 3 +- .../SelectionDAG/SelectionDAGBuilder.cpp | 4 +- llvm/lib/ExecutionEngine/Orc/Speculation.cpp | 2 +- llvm/lib/IR/AutoUpgrade.cpp | 4 +- llvm/lib/IR/DataLayout.cpp | 2 +- llvm/lib/IR/IRBuilder.cpp | 2 +- .../AArch64/AArch64CompressJumpTables.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.h | 2 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 2 +- llvm/lib/Target/AMDGPU/R600FrameLowering.h | 2 +- llvm/lib/Target/AMDGPU/SIFrameLowering.h | 2 +- llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMBasicBlockInfo.h | 6 +- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 2 +- llvm/lib/Target/AVR/AVRFrameLowering.cpp | 3 +- .../Hexagon/HexagonBranchRelaxation.cpp | 2 +- .../Target/Hexagon/HexagonFixupHwLoops.cpp | 2 +- .../lib/Target/Hexagon/HexagonFrameLowering.h | 2 +- .../Hexagon/HexagonTargetTransformInfo.cpp | 2 +- llvm/lib/Target/Mips/MipsCallLowering.cpp | 2 +- .../Target/Mips/MipsConstantIslandPass.cpp | 2 +- llvm/lib/Target/PowerPC/PPCBranchSelector.cpp | 2 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 8 +-- .../Target/X86/MCTargetDesc/X86AsmBackend.cpp | 3 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 6 +- .../InstCombine/InstCombineCalls.cpp | 8 +-- .../Instrumentation/AddressSanitizer.cpp | 2 +- .../Instrumentation/HWAddressSanitizer.cpp | 2 +- .../Instrumentation/InstrProfiling.cpp | 2 +- .../Instrumentation/Instrumentation.cpp | 4 +- .../Instrumentation/MemorySanitizer.cpp | 13 ++-- llvm/lib/Transforms/Utils/InlineFunction.cpp | 4 +- .../lib/Transforms/Utils/SimplifyLibCalls.cpp | 68 ++++++++----------- llvm/unittests/Support/AlignmentTest.cpp | 1 - polly/lib/CodeGen/LoopGeneratorsKMP.cpp | 2 +- 47 files changed, 111 insertions(+), 120 deletions(-) diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index 04511e892adf..a48f6d2215b3 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -10591,11 +10591,11 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, case X86::BI__builtin_ia32_storedquqi512_mask: case X86::BI__builtin_ia32_storeupd512_mask: case X86::BI__builtin_ia32_storeups512_mask: - return EmitX86MaskedStore(*this, Ops, Align::None()); + return EmitX86MaskedStore(*this, Ops, Align(1)); case X86::BI__builtin_ia32_storess128_mask: case X86::BI__builtin_ia32_storesd128_mask: - return EmitX86MaskedStore(*this, Ops, Align::None()); + return EmitX86MaskedStore(*this, Ops, Align(1)); case X86::BI__builtin_ia32_vpopcntb_128: case X86::BI__builtin_ia32_vpopcntd_128: @@ -10730,11 +10730,11 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, case X86::BI__builtin_ia32_loaddqudi128_mask: case X86::BI__builtin_ia32_loaddqudi256_mask: case X86::BI__builtin_ia32_loaddqudi512_mask: - return EmitX86MaskedLoad(*this, Ops, Align::None()); + return EmitX86MaskedLoad(*this, Ops, Align(1)); case X86::BI__builtin_ia32_loadss128_mask: case X86::BI__builtin_ia32_loadsd128_mask: - return EmitX86MaskedLoad(*this, Ops, Align::None()); + return EmitX86MaskedLoad(*this, Ops, Align(1)); case X86::BI__builtin_ia32_loadaps128_mask: case X86::BI__builtin_ia32_loadaps256_mask: @@ -11558,7 +11558,7 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, // Unaligned nontemporal store of the scalar value. StoreInst *SI = Builder.CreateDefaultAlignedStore(Src, BC); SI->setMetadata(CGM.getModule().getMDKindID("nontemporal"), Node); - SI->setAlignment(llvm::Align::None()); + SI->setAlignment(llvm::Align(1)); return SI; } // Rotate is a special case of funnel shift - 1st 2 args are the same. @@ -12509,7 +12509,7 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, case X86::BI__stosb: { // We treat __stosb as a volatile memset - it may not generate "rep stosb" // instruction, but it will create a memset that won't be optimized away. - return Builder.CreateMemSet(Ops[0], Ops[1], Ops[2], Align::None(), true); + return Builder.CreateMemSet(Ops[0], Ops[1], Ops[2], Align(1), true); } case X86::BI__ud2: // llvm.trap makes a ud2a instruction on x86. diff --git a/clang/lib/CodeGen/CGObjCMac.cpp b/clang/lib/CodeGen/CGObjCMac.cpp index b36d97357906..ab2dee1b323d 100644 --- a/clang/lib/CodeGen/CGObjCMac.cpp +++ b/clang/lib/CodeGen/CGObjCMac.cpp @@ -2035,7 +2035,7 @@ CGObjCCommonMac::GenerateConstantNSString(const StringLiteral *Literal) { GV->setUnnamedAddr(llvm::GlobalValue::UnnamedAddr::Global); // Don't enforce the target's minimum global alignment, since the only use // of the string is via this class initializer. - GV->setAlignment(llvm::Align::None()); + GV->setAlignment(llvm::Align(1)); Fields.addBitCast(GV, CGM.Int8PtrTy); // String length. diff --git a/llvm/include/llvm/CodeGen/AsmPrinter.h b/llvm/include/llvm/CodeGen/AsmPrinter.h index a860ce2773e1..2cd407b1ab6e 100644 --- a/llvm/include/llvm/CodeGen/AsmPrinter.h +++ b/llvm/include/llvm/CodeGen/AsmPrinter.h @@ -659,7 +659,7 @@ public: /// Return the alignment for the specified \p GV. static Align getGVAlignment(const GlobalValue *GV, const DataLayout &DL, - Align InAlign = Align::None()); + Align InAlign = Align(1)); private: /// Private state for PrintSpecial() diff --git a/llvm/include/llvm/CodeGen/TargetFrameLowering.h b/llvm/include/llvm/CodeGen/TargetFrameLowering.h index a5ed1d8a9fcc..edfbdc3350b4 100644 --- a/llvm/include/llvm/CodeGen/TargetFrameLowering.h +++ b/llvm/include/llvm/CodeGen/TargetFrameLowering.h @@ -75,7 +75,7 @@ private: bool StackRealignable; public: TargetFrameLowering(StackDirection D, Align StackAl, int LAO, - Align TransAl = Align::None(), bool StackReal = true) + Align TransAl = Align(1), bool StackReal = true) : StackDir(D), StackAlignment(StackAl), TransientStackAlignment(TransAl), LocalAreaOffset(LAO), StackRealignable(StackReal) {} diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h index 1714da2c2a9d..8126ce9b95b5 100644 --- a/llvm/include/llvm/CodeGen/TargetLowering.h +++ b/llvm/include/llvm/CodeGen/TargetLowering.h @@ -864,7 +864,7 @@ public: int offset = 0; // offset off of ptrVal uint64_t size = 0; // the size of the memory location // (taken from memVT if zero) - MaybeAlign align = Align::None(); // alignment + MaybeAlign align = Align(1); // alignment MachineMemOperand::Flags flags = MachineMemOperand::MONone; IntrinsicInfo() = default; diff --git a/llvm/include/llvm/Support/Alignment.h b/llvm/include/llvm/Support/Alignment.h index 72fad87dd0d4..05cf82f0def1 100644 --- a/llvm/include/llvm/Support/Alignment.h +++ b/llvm/include/llvm/Support/Alignment.h @@ -86,11 +86,14 @@ public: uint64_t value() const { return uint64_t(1) << ShiftValue; } /// Returns a default constructed Align which corresponds to no alignment. - /// This is useful to test for unalignment as it conveys clear semantic. - /// `if (A != Align::None())` - /// would be better than - /// `if (A > Align(1))` - constexpr static const Align None() { return Align(); } + /// It was decided to deprecate Align::None because it's too close to + /// llvm::None which can be used to initialize `MaybeAlign`. + /// MaybeAlign = llvm::None means unspecified alignment, + /// Align = Align::None() means alignment of one byte. + LLVM_ATTRIBUTE_DEPRECATED(constexpr static const Align None(), + "Use Align() or Align(1) instead") { + return Align(); + } /// Allow constructions of constexpr Align. template constexpr static LogValue Constant() { @@ -184,7 +187,8 @@ inline uint64_t alignTo(uint64_t Size, MaybeAlign A) { inline uintptr_t alignAddr(const void *Addr, Align Alignment) { uintptr_t ArithAddr = reinterpret_cast(Addr); assert(static_cast(ArithAddr + Alignment.value() - 1) >= - ArithAddr && "Overflow"); + ArithAddr && + "Overflow"); return alignTo(ArithAddr, Alignment); } diff --git a/llvm/lib/Analysis/Loads.cpp b/llvm/lib/Analysis/Loads.cpp index ac34108fccfc..4ee2d7c52927 100644 --- a/llvm/lib/Analysis/Loads.cpp +++ b/llvm/lib/Analysis/Loads.cpp @@ -162,7 +162,7 @@ bool llvm::isDereferenceablePointer(const Value *V, Type *Ty, const DataLayout &DL, const Instruction *CtxI, const DominatorTree *DT) { - return isDereferenceableAndAlignedPointer(V, Ty, Align::None(), DL, CtxI, DT); + return isDereferenceableAndAlignedPointer(V, Ty, Align(1), DL, CtxI, DT); } /// Test if A and B will obviously have the same value. diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp index 83e6ef5fa8ac..f38c3f3c50ae 100644 --- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -2182,7 +2182,7 @@ void AsmPrinter::EmitAlignment(Align Alignment, const GlobalObject *GV) const { if (GV) Alignment = getGVAlignment(GV, GV->getParent()->getDataLayout(), Alignment); - if (Alignment == Align::None()) + if (Alignment == Align(1)) return; // 1-byte aligned: no need to emit alignment. if (getCurrentSection()->getKind().isText()) @@ -2955,7 +2955,7 @@ void AsmPrinter::EmitBasicBlockStart(const MachineBasicBlock &MBB) { // Emit an alignment directive for this block, if needed. const Align Alignment = MBB.getAlignment(); - if (Alignment != Align::None()) + if (Alignment != Align(1)) EmitAlignment(Alignment); // If the block has its address taken, emit any labels that were used to diff --git a/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp b/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp index c0c865ecbe02..294e08978b37 100644 --- a/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp +++ b/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp @@ -239,7 +239,7 @@ bool CallLowering::handleAssignments(CCState &CCInfo, if (Part == 0) { Flags.setSplit(); } else { - Flags.setOrigAlign(Align::None()); + Flags.setOrigAlign(Align(1)); if (Part == NumParts - 1) Flags.setSplitEnd(); } @@ -272,7 +272,7 @@ bool CallLowering::handleAssignments(CCState &CCInfo, if (PartIdx == 0) { Flags.setSplit(); } else { - Flags.setOrigAlign(Align::None()); + Flags.setOrigAlign(Align(1)); if (PartIdx == NumParts - 1) Flags.setSplitEnd(); } diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp index e8cd3d60ccb1..0f8e036db24c 100644 --- a/llvm/lib/CodeGen/MIRPrinter.cpp +++ b/llvm/lib/CodeGen/MIRPrinter.cpp @@ -629,7 +629,7 @@ void MIPrinter::print(const MachineBasicBlock &MBB) { OS << "landing-pad"; HasAttributes = true; } - if (MBB.getAlignment() != Align::None()) { + if (MBB.getAlignment() != Align(1)) { OS << (HasAttributes ? ", " : " ("); OS << "align " << MBB.getAlignment().value(); HasAttributes = true; diff --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp index ec19466ea1b3..1ef7867ad1b5 100644 --- a/llvm/lib/CodeGen/MachineBasicBlock.cpp +++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp @@ -326,7 +326,7 @@ void MachineBasicBlock::print(raw_ostream &OS, ModuleSlotTracker &MST, OS << "landing-pad"; HasAttributes = true; } - if (getAlignment() != Align::None()) { + if (getAlignment() != Align(1)) { OS << (HasAttributes ? ", " : " ("); OS << "align " << Log2(getAlignment()); HasAttributes = true; diff --git a/llvm/lib/CodeGen/MachineFrameInfo.cpp b/llvm/lib/CodeGen/MachineFrameInfo.cpp index 22ab2c7a6d77..e5f35aea98cc 100644 --- a/llvm/lib/CodeGen/MachineFrameInfo.cpp +++ b/llvm/lib/CodeGen/MachineFrameInfo.cpp @@ -89,7 +89,7 @@ int MachineFrameInfo::CreateFixedObject(uint64_t Size, int64_t SPOffset, // stack needs realignment, we can't assume that the stack will in fact be // aligned. Align Alignment = - commonAlignment(ForcedRealign ? Align::None() : StackAlignment, SPOffset); + commonAlignment(ForcedRealign ? Align(1) : StackAlignment, SPOffset); Alignment = clampStackAlignment(!StackRealignable, Alignment, StackAlignment); Objects.insert(Objects.begin(), StackObject(Size, Alignment, SPOffset, IsImmutable, @@ -102,7 +102,7 @@ int MachineFrameInfo::CreateFixedSpillStackObject(uint64_t Size, int64_t SPOffset, bool IsImmutable) { Align Alignment = - commonAlignment(ForcedRealign ? Align::None() : StackAlignment, SPOffset); + commonAlignment(ForcedRealign ? Align(1) : StackAlignment, SPOffset); Alignment = clampStackAlignment(!StackRealignable, Alignment, StackAlignment); Objects.insert(Objects.begin(), StackObject(Size, Alignment, SPOffset, IsImmutable, diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp index 0614ab57eb26..c7cbd9e51aa5 100644 --- a/llvm/lib/CodeGen/MachineOperand.cpp +++ b/llvm/lib/CodeGen/MachineOperand.cpp @@ -970,8 +970,7 @@ bool MachinePointerInfo::isDereferenceable(unsigned Size, LLVMContext &C, return false; return isDereferenceableAndAlignedPointer( - BasePtr, Align::None(), APInt(DL.getPointerSizeInBits(), Offset + Size), - DL); + BasePtr, Align(1), APInt(DL.getPointerSizeInBits(), Offset + Size), DL); } /// getConstantPool - Return a MachinePointerInfo record that refers to the diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 59931b1ea5b5..d7b94cd31079 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -9279,7 +9279,7 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const { if (NumParts > 1 && j == 0) MyFlags.Flags.setSplit(); else if (j != 0) { - MyFlags.Flags.setOrigAlign(Align::None()); + MyFlags.Flags.setOrigAlign(Align(1)); if (j == NumParts - 1) MyFlags.Flags.setSplitEnd(); } @@ -9754,7 +9754,7 @@ void SelectionDAGISel::LowerArguments(const Function &F) { MyFlags.Flags.setSplit(); // if it isn't first piece, alignment must be 1 else if (i > 0) { - MyFlags.Flags.setOrigAlign(Align::None()); + MyFlags.Flags.setOrigAlign(Align(1)); if (i == NumRegs - 1) MyFlags.Flags.setSplitEnd(); } diff --git a/llvm/lib/ExecutionEngine/Orc/Speculation.cpp b/llvm/lib/ExecutionEngine/Orc/Speculation.cpp index f29201c147a1..0530b1a97b67 100644 --- a/llvm/lib/ExecutionEngine/Orc/Speculation.cpp +++ b/llvm/lib/ExecutionEngine/Orc/Speculation.cpp @@ -96,7 +96,7 @@ void IRSpeculationLayer::emit(MaterializationResponsibility R, M, LoadValueTy, false, GlobalValue::LinkageTypes::InternalLinkage, ConstantInt::get(LoadValueTy, 0), "__orc_speculate.guard.for." + Fn.getName()); - SpeculatorGuard->setAlignment(Align::None()); + SpeculatorGuard->setAlignment(Align(1)); SpeculatorGuard->setUnnamedAddr(GlobalValue::UnnamedAddr::Local); BasicBlock &ProgramEntry = Fn.getEntryBlock(); diff --git a/llvm/lib/IR/AutoUpgrade.cpp b/llvm/lib/IR/AutoUpgrade.cpp index 115500cff1de..857e26412336 100644 --- a/llvm/lib/IR/AutoUpgrade.cpp +++ b/llvm/lib/IR/AutoUpgrade.cpp @@ -1239,7 +1239,7 @@ static Value *UpgradeMaskedStore(IRBuilder<> &Builder, llvm::PointerType::getUnqual(Data->getType())); const Align Alignment = Aligned ? Align(cast(Data->getType())->getBitWidth() / 8) - : Align::None(); + : Align(1); // If the mask is all ones just emit a regular store. if (const auto *C = dyn_cast(Mask)) @@ -1260,7 +1260,7 @@ static Value *UpgradeMaskedLoad(IRBuilder<> &Builder, Ptr = Builder.CreateBitCast(Ptr, llvm::PointerType::getUnqual(ValTy)); const Align Alignment = Aligned ? Align(cast(Passthru->getType())->getBitWidth() / 8) - : Align::None(); + : Align(1); // If the mask is all ones just emit a regular store. if (const auto *C = dyn_cast(Mask)) diff --git a/llvm/lib/IR/DataLayout.cpp b/llvm/lib/IR/DataLayout.cpp index 3fdd94b5a790..26ec6db63c07 100644 --- a/llvm/lib/IR/DataLayout.cpp +++ b/llvm/lib/IR/DataLayout.cpp @@ -718,7 +718,7 @@ Align DataLayout::getAlignment(Type *Ty, bool abi_or_pref) const { case Type::StructTyID: { // Packed structure types always have an ABI alignment of one. if (cast(Ty)->isPacked() && abi_or_pref) - return Align::None(); + return Align(1); // Get the layout annotation... which is lazily created on demand. const StructLayout *Layout = getStructLayout(cast(Ty)); diff --git a/llvm/lib/IR/IRBuilder.cpp b/llvm/lib/IR/IRBuilder.cpp index b86ee4964b7e..5d6f839cd1a0 100644 --- a/llvm/lib/IR/IRBuilder.cpp +++ b/llvm/lib/IR/IRBuilder.cpp @@ -49,7 +49,7 @@ GlobalVariable *IRBuilderBase::CreateGlobalString(StringRef Str, nullptr, GlobalVariable::NotThreadLocal, AddressSpace); GV->setUnnamedAddr(GlobalValue::UnnamedAddr::Global); - GV->setAlignment(Align::None()); + GV->setAlignment(Align(1)); return GV; } diff --git a/llvm/lib/Target/AArch64/AArch64CompressJumpTables.cpp b/llvm/lib/Target/AArch64/AArch64CompressJumpTables.cpp index 259238705965..57dc8a4061f1 100644 --- a/llvm/lib/Target/AArch64/AArch64CompressJumpTables.cpp +++ b/llvm/lib/Target/AArch64/AArch64CompressJumpTables.cpp @@ -79,7 +79,7 @@ void AArch64CompressJumpTables::scanFunction() { for (MachineBasicBlock &MBB : *MF) { const Align Alignment = MBB.getAlignment(); unsigned AlignedOffset; - if (Alignment == Align::None()) + if (Alignment == Align(1)) AlignedOffset = Offset; else AlignedOffset = alignTo(Offset, Alignment); diff --git a/llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.h b/llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.h index 92e256cf2829..260a18e278cf 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.h @@ -26,7 +26,7 @@ namespace llvm { class AMDGPUFrameLowering : public TargetFrameLowering { public: AMDGPUFrameLowering(StackDirection D, Align StackAl, int LAO, - Align TransAl = Align::None()); + Align TransAl = Align(1)); ~AMDGPUFrameLowering() override; /// \returns The number of 32-bit sub-registers that are used when storing diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp index 445e91092499..6d10ebd24782 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp @@ -497,7 +497,7 @@ uint64_t AMDGPUSubtarget::getExplicitKernArgSize(const Function &F, const DataLayout &DL = F.getParent()->getDataLayout(); uint64_t ExplicitArgBytes = 0; - MaxAlign = Align::None(); + MaxAlign = Align(1); for (const Argument &Arg : F.args()) { Type *ArgTy = Arg.getType(); diff --git a/llvm/lib/Target/AMDGPU/R600FrameLowering.h b/llvm/lib/Target/AMDGPU/R600FrameLowering.h index 283e4d1935ea..722d516922ae 100644 --- a/llvm/lib/Target/AMDGPU/R600FrameLowering.h +++ b/llvm/lib/Target/AMDGPU/R600FrameLowering.h @@ -16,7 +16,7 @@ namespace llvm { class R600FrameLowering : public AMDGPUFrameLowering { public: R600FrameLowering(StackDirection D, Align StackAl, int LAO, - Align TransAl = Align::None()) + Align TransAl = Align(1)) : AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {} ~R600FrameLowering() override; diff --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.h b/llvm/lib/Target/AMDGPU/SIFrameLowering.h index d9970fd6b4b8..8dd09726f6d2 100644 --- a/llvm/lib/Target/AMDGPU/SIFrameLowering.h +++ b/llvm/lib/Target/AMDGPU/SIFrameLowering.h @@ -21,7 +21,7 @@ class GCNSubtarget; class SIFrameLowering final : public AMDGPUFrameLowering { public: SIFrameLowering(StackDirection D, Align StackAl, int LAO, - Align TransAl = Align::None()) + Align TransAl = Align(1)) : AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {} ~SIFrameLowering() override = default; diff --git a/llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp b/llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp index 00a2231f59e3..6d389cc82730 100644 --- a/llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp @@ -49,7 +49,7 @@ void ARMBasicBlockUtils::computeBlockSize(MachineBasicBlock *MBB) { BasicBlockInfo &BBI = BBInfo[MBB->getNumber()]; BBI.Size = 0; BBI.Unalign = 0; - BBI.PostAlign = Align::None(); + BBI.PostAlign = Align(1); for (MachineInstr &I : *MBB) { BBI.Size += TII->getInstSizeInBytes(I); diff --git a/llvm/lib/Target/ARM/ARMBasicBlockInfo.h b/llvm/lib/Target/ARM/ARMBasicBlockInfo.h index 13df399ed995..47d9a4049fa0 100644 --- a/llvm/lib/Target/ARM/ARMBasicBlockInfo.h +++ b/llvm/lib/Target/ARM/ARMBasicBlockInfo.h @@ -87,10 +87,10 @@ struct BasicBlockInfo { /// Compute the offset immediately following this block. If Align is /// specified, return the offset the successor block will get if it has /// this alignment. - unsigned postOffset(Align Alignment = Align::None()) const { + unsigned postOffset(Align Alignment = Align(1)) const { unsigned PO = Offset + Size; const Align PA = std::max(PostAlign, Alignment); - if (PA == Align::None()) + if (PA == Align(1)) return PO; // Add alignment padding from the terminator. return PO + UnknownPadding(PA, internalKnownBits()); @@ -101,7 +101,7 @@ struct BasicBlockInfo { /// instruction alignment. An aligned terminator may increase the number /// of know bits. /// If LogAlign is given, also consider the alignment of the next block. - unsigned postKnownBits(Align Align = Align::None()) const { + unsigned postKnownBits(Align Align = llvm::Align(1)) const { return std::max(Log2(std::max(PostAlign, Align)), internalKnownBits()); } }; diff --git a/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp b/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp index 634fb89b8e89..d3d3b25341fb 100644 --- a/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp +++ b/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp @@ -1566,7 +1566,7 @@ void ARMConstantIslands::removeDeadCPEMI(MachineInstr *CPEMI) { BBInfo[CPEBB->getNumber()].Size = 0; // This block no longer needs to be aligned. - CPEBB->setAlignment(Align::None()); + CPEBB->setAlignment(Align(1)); } else { // Entries are sorted by descending alignment, so realign from the front. CPEBB->setAlignment(getCPEAlign(&*CPEBB->begin())); diff --git a/llvm/lib/Target/AVR/AVRFrameLowering.cpp b/llvm/lib/Target/AVR/AVRFrameLowering.cpp index e6c48de5a782..97e1292b3dd7 100644 --- a/llvm/lib/Target/AVR/AVRFrameLowering.cpp +++ b/llvm/lib/Target/AVR/AVRFrameLowering.cpp @@ -30,8 +30,7 @@ namespace llvm { AVRFrameLowering::AVRFrameLowering() - : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align::None(), - -2) {} + : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align(1), -2) {} bool AVRFrameLowering::canSimplifyCallFramePseudos( const MachineFunction &MF) const { diff --git a/llvm/lib/Target/Hexagon/HexagonBranchRelaxation.cpp b/llvm/lib/Target/Hexagon/HexagonBranchRelaxation.cpp index 08f740806879..6891455631a8 100644 --- a/llvm/lib/Target/Hexagon/HexagonBranchRelaxation.cpp +++ b/llvm/lib/Target/Hexagon/HexagonBranchRelaxation.cpp @@ -105,7 +105,7 @@ void HexagonBranchRelaxation::computeOffset(MachineFunction &MF, // offset of the current instruction from the start. unsigned InstOffset = 0; for (auto &B : MF) { - if (B.getAlignment() != Align::None()) { + if (B.getAlignment() != Align(1)) { // Although we don't know the exact layout of the final code, we need // to account for alignment padding somehow. This heuristic pads each // aligned basic block according to the alignment value. diff --git a/llvm/lib/Target/Hexagon/HexagonFixupHwLoops.cpp b/llvm/lib/Target/Hexagon/HexagonFixupHwLoops.cpp index d21de8ccb5ab..7b563bc4681b 100644 --- a/llvm/lib/Target/Hexagon/HexagonFixupHwLoops.cpp +++ b/llvm/lib/Target/Hexagon/HexagonFixupHwLoops.cpp @@ -114,7 +114,7 @@ bool HexagonFixupHwLoops::fixupLoopInstrs(MachineFunction &MF) { // First pass - compute the offset of each basic block. for (const MachineBasicBlock &MBB : MF) { - if (MBB.getAlignment() != Align::None()) { + if (MBB.getAlignment() != Align(1)) { // Although we don't know the exact layout of the final code, we need // to account for alignment padding somehow. This heuristic pads each // aligned basic block according to the alignment value. diff --git a/llvm/lib/Target/Hexagon/HexagonFrameLowering.h b/llvm/lib/Target/Hexagon/HexagonFrameLowering.h index 65e6185ac559..8625aa687f21 100644 --- a/llvm/lib/Target/Hexagon/HexagonFrameLowering.h +++ b/llvm/lib/Target/Hexagon/HexagonFrameLowering.h @@ -32,7 +32,7 @@ public: // First register which could possibly hold a variable argument. int FirstVarArgSavedReg; explicit HexagonFrameLowering() - : TargetFrameLowering(StackGrowsDown, Align(8), 0, Align::None(), true) {} + : TargetFrameLowering(StackGrowsDown, Align(8), 0, Align(1), true) {} // All of the prolog/epilog functionality, including saving and restoring // callee-saved registers is handled in emitPrologue. This is to have the diff --git a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp index 4d4627cd2071..7ec8070f21bc 100644 --- a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp +++ b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp @@ -183,7 +183,7 @@ unsigned HexagonTTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Cost = VecTy->getElementType()->isFloatingPointTy() ? FloatFactor : 1; - // At this point unspecified alignment is considered as Align::None(). + // At this point unspecified alignment is considered as Align(1). const Align BoundAlignment = std::min(Alignment.valueOrOne(), Align(8)); unsigned AlignWidth = 8 * BoundAlignment.value(); unsigned NumLoads = alignTo(VecWidth, AlignWidth) / AlignWidth; diff --git a/llvm/lib/Target/Mips/MipsCallLowering.cpp b/llvm/lib/Target/Mips/MipsCallLowering.cpp index 6ba15c232867..1c8ce1f5dbd3 100644 --- a/llvm/lib/Target/Mips/MipsCallLowering.cpp +++ b/llvm/lib/Target/Mips/MipsCallLowering.cpp @@ -691,7 +691,7 @@ void MipsCallLowering::subTargetRegTypeForCallingConv( if (i == 0) Flags.setOrigAlign(TLI.getABIAlignmentForCallingConv(Arg.Ty, DL)); else - Flags.setOrigAlign(Align::None()); + Flags.setOrigAlign(Align(1)); ISDArgs.emplace_back(Flags, RegisterVT, VT, true, OrigArgIndices[ArgNo], 0); diff --git a/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp b/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp index 1f1a1574443c..fa5716b49397 100644 --- a/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp +++ b/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp @@ -940,7 +940,7 @@ bool MipsConstantIslands::isWaterInRange(unsigned UserOffset, MachineFunction::const_iterator NextBlock = ++Water->getIterator(); if (NextBlock == MF->end()) { NextBlockOffset = BBInfo[Water->getNumber()].postOffset(); - NextBlockAlignment = Align::None(); + NextBlockAlignment = Align(1); } else { NextBlockOffset = BBInfo[NextBlock->getNumber()].Offset; NextBlockAlignment = NextBlock->getAlignment(); diff --git a/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp b/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp index cdff4d383d23..31187c7cee55 100644 --- a/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp +++ b/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp @@ -82,7 +82,7 @@ FunctionPass *llvm::createPPCBranchSelectionPass() { unsigned PPCBSel::GetAlignmentAdjustment(MachineBasicBlock &MBB, unsigned Offset) { const Align Alignment = MBB.getAlignment(); - if (Alignment == Align::None()) + if (Alignment == Align(1)) return 0; const Align ParentAlign = MBB.getParent()->getAlignment(); diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 377d7c66f341..dee8852a47d4 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -14939,7 +14939,7 @@ bool PPCTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info, Info.ptrVal = I.getArgOperand(0); Info.offset = -VT.getStoreSize()+1; Info.size = 2*VT.getStoreSize()-1; - Info.align = Align::None(); + Info.align = Align(1); Info.flags = MachineMemOperand::MOLoad; return true; } @@ -14973,7 +14973,7 @@ bool PPCTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info, Info.ptrVal = I.getArgOperand(0); Info.offset = 0; Info.size = VT.getStoreSize(); - Info.align = Align::None(); + Info.align = Align(1); Info.flags = MachineMemOperand::MOLoad; return true; } @@ -15025,7 +15025,7 @@ bool PPCTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info, Info.ptrVal = I.getArgOperand(1); Info.offset = -VT.getStoreSize()+1; Info.size = 2*VT.getStoreSize()-1; - Info.align = Align::None(); + Info.align = Align(1); Info.flags = MachineMemOperand::MOStore; return true; } @@ -15058,7 +15058,7 @@ bool PPCTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info, Info.ptrVal = I.getArgOperand(1); Info.offset = 0; Info.size = VT.getStoreSize(); - Info.align = Align::None(); + Info.align = Align(1); Info.flags = MachineMemOperand::MOStore; return true; } diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp index dffda5217675..654833260f8f 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp +++ b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp @@ -355,8 +355,7 @@ static bool hasVariantSymbol(const MCInst &MI) { } bool X86AsmBackend::allowAutoPadding() const { - return (AlignBoundary != Align::None() && - AlignBranchType != X86::AlignBranchNone); + return (AlignBoundary != Align(1) && AlignBranchType != X86::AlignBranchNone); } bool X86AsmBackend::needAlign(MCObjectStreamer &OS) const { diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 74b5dbfff6f8..d8c7a51a6890 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -4972,7 +4972,7 @@ bool X86TargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info, ScalarVT = MVT::i32; Info.memVT = MVT::getVectorVT(ScalarVT, VT.getVectorNumElements()); - Info.align = Align::None(); + Info.align = Align(1); Info.flags |= MachineMemOperand::MOStore; break; } @@ -4985,7 +4985,7 @@ bool X86TargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info, unsigned NumElts = std::min(DataVT.getVectorNumElements(), IndexVT.getVectorNumElements()); Info.memVT = MVT::getVectorVT(DataVT.getVectorElementType(), NumElts); - Info.align = Align::None(); + Info.align = Align(1); Info.flags |= MachineMemOperand::MOLoad; break; } @@ -4997,7 +4997,7 @@ bool X86TargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info, unsigned NumElts = std::min(DataVT.getVectorNumElements(), IndexVT.getVectorNumElements()); Info.memVT = MVT::getVectorVT(DataVT.getVectorElementType(), NumElts); - Info.align = Align::None(); + Info.align = Align(1); Info.flags |= MachineMemOperand::MOStore; break; } diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp index 657d95b5b246..661988ba4983 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp @@ -1332,7 +1332,7 @@ static Instruction *simplifyX86MaskedLoad(IntrinsicInst &II, InstCombiner &IC) { // The pass-through vector for an x86 masked load is a zero vector. CallInst *NewMaskedLoad = - IC.Builder.CreateMaskedLoad(PtrCast, Align::None(), BoolMask, ZeroVec); + IC.Builder.CreateMaskedLoad(PtrCast, Align(1), BoolMask, ZeroVec); return IC.replaceInstUsesWith(II, NewMaskedLoad); } @@ -1373,7 +1373,7 @@ static bool simplifyX86MaskedStore(IntrinsicInst &II, InstCombiner &IC) { // on each element's most significant bit (the sign bit). Constant *BoolMask = getNegativeIsTrueBoolVec(ConstMask); - IC.Builder.CreateMaskedStore(Vec, PtrCast, Align::None(), BoolMask); + IC.Builder.CreateMaskedStore(Vec, PtrCast, Align(1), BoolMask); // 'Replace uses' doesn't work for stores. Erase the original masked store. IC.eraseInstFromFunction(II); @@ -2381,7 +2381,7 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) { // Turn PPC VSX loads into normal loads. Value *Ptr = Builder.CreateBitCast(II->getArgOperand(0), PointerType::getUnqual(II->getType())); - return new LoadInst(II->getType(), Ptr, Twine(""), false, Align::None()); + return new LoadInst(II->getType(), Ptr, Twine(""), false, Align(1)); } case Intrinsic::ppc_altivec_stvx: case Intrinsic::ppc_altivec_stvxl: @@ -2399,7 +2399,7 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) { // Turn PPC VSX stores into normal stores. Type *OpPtrTy = PointerType::getUnqual(II->getArgOperand(0)->getType()); Value *Ptr = Builder.CreateBitCast(II->getArgOperand(1), OpPtrTy); - return new StoreInst(II->getArgOperand(0), Ptr, false, Align::None()); + return new StoreInst(II->getArgOperand(0), Ptr, false, Align(1)); } case Intrinsic::ppc_qpx_qvlfs: // Turn PPC QPX qvlfs -> load if the pointer is known aligned. diff --git a/llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp b/llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp index 190d4e22ae20..73a0e10c4f2f 100644 --- a/llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp +++ b/llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp @@ -2362,7 +2362,7 @@ bool ModuleAddressSanitizer::InstrumentGlobals(IRBuilder<> &IRB, Module &M, // Set meaningful attributes for indicator symbol. ODRIndicatorSym->setVisibility(NewGlobal->getVisibility()); ODRIndicatorSym->setDLLStorageClass(NewGlobal->getDLLStorageClass()); - ODRIndicatorSym->setAlignment(Align::None()); + ODRIndicatorSym->setAlignment(Align(1)); ODRIndicator = ODRIndicatorSym; } diff --git a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp index 4f69234a58b9..9470cb2cfb28 100644 --- a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp +++ b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp @@ -789,7 +789,7 @@ bool HWAddressSanitizer::tagAlloca(IRBuilder<> &IRB, AllocaInst *AI, // llvm.memset right here into either a sequence of stores, or a call to // hwasan_tag_memory. if (ShadowSize) - IRB.CreateMemSet(ShadowPtr, JustTag, ShadowSize, Align::None()); + IRB.CreateMemSet(ShadowPtr, JustTag, ShadowSize, Align(1)); if (Size != AlignedSize) { IRB.CreateStore( ConstantInt::get(Int8Ty, Size % Mapping.getObjectAlignment()), diff --git a/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp b/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp index 0df833c0959a..4aa774e7d301 100644 --- a/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp +++ b/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp @@ -964,7 +964,7 @@ void InstrProfiling::emitNameData() { // On COFF, it's important to reduce the alignment down to 1 to prevent the // linker from inserting padding before the start of the names section or // between names entries. - NamesVar->setAlignment(Align::None()); + NamesVar->setAlignment(Align(1)); UsedVars.push_back(NamesVar); for (auto *NamePtr : ReferencedNames) diff --git a/llvm/lib/Transforms/Instrumentation/Instrumentation.cpp b/llvm/lib/Transforms/Instrumentation/Instrumentation.cpp index a6c2c9b464b6..f675e2661eab 100644 --- a/llvm/lib/Transforms/Instrumentation/Instrumentation.cpp +++ b/llvm/lib/Transforms/Instrumentation/Instrumentation.cpp @@ -68,8 +68,8 @@ GlobalVariable *llvm::createPrivateGlobalForString(Module &M, StringRef Str, GlobalValue::PrivateLinkage, StrConst, NamePrefix); if (AllowMerging) GV->setUnnamedAddr(GlobalValue::UnnamedAddr::Global); - GV->setAlignment(Align::None()); // Strings may not be merged w/o setting - // alignment explicitly. + GV->setAlignment(Align(1)); // Strings may not be merged w/o setting + // alignment explicitly. return GV; } diff --git a/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp b/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp index 0a5cf72a38cb..04293a766666 100644 --- a/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp +++ b/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp @@ -1820,7 +1820,7 @@ struct MemorySanitizerVisitor : public InstVisitor { IRBuilder<> IRB(&I); Value *Addr = I.getOperand(0); - Value *ShadowPtr = getShadowOriginPtr(Addr, IRB, I.getType(), Align::None(), + Value *ShadowPtr = getShadowOriginPtr(Addr, IRB, I.getType(), Align(1), /*isStore*/ true) .first; @@ -2453,7 +2453,7 @@ struct MemorySanitizerVisitor : public InstVisitor { // We don't know the pointer alignment (could be unaligned SSE store!). // Have to assume to worst case. std::tie(ShadowPtr, OriginPtr) = getShadowOriginPtr( - Addr, IRB, Shadow->getType(), Align::None(), /*isStore*/ true); + Addr, IRB, Shadow->getType(), Align(1), /*isStore*/ true); IRB.CreateAlignedStore(Shadow, ShadowPtr, Align(1)); if (ClCheckAccessAddress) @@ -2477,7 +2477,7 @@ struct MemorySanitizerVisitor : public InstVisitor { if (PropagateShadow) { // We don't know the pointer alignment (could be unaligned SSE load!). // Have to assume to worst case. - const Align Alignment = Align::None(); + const Align Alignment = Align(1); std::tie(ShadowPtr, OriginPtr) = getShadowOriginPtr(Addr, IRB, ShadowTy, Alignment, /*isStore*/ false); setShadow(&I, @@ -2868,8 +2868,7 @@ struct MemorySanitizerVisitor : public InstVisitor { Value* Addr = I.getArgOperand(0); Type *Ty = IRB.getInt32Ty(); Value *ShadowPtr = - getShadowOriginPtr(Addr, IRB, Ty, Align::None(), /*isStore*/ true) - .first; + getShadowOriginPtr(Addr, IRB, Ty, Align(1), /*isStore*/ true).first; IRB.CreateStore(getCleanShadow(Ty), IRB.CreatePointerCast(ShadowPtr, Ty->getPointerTo())); @@ -2884,7 +2883,7 @@ struct MemorySanitizerVisitor : public InstVisitor { IRBuilder<> IRB(&I); Value *Addr = I.getArgOperand(0); Type *Ty = IRB.getInt32Ty(); - const Align Alignment = Align::None(); + const Align Alignment = Align(1); Value *ShadowPtr, *OriginPtr; std::tie(ShadowPtr, OriginPtr) = getShadowOriginPtr(Addr, IRB, Ty, Alignment, /*isStore*/ false); @@ -3450,7 +3449,7 @@ struct MemorySanitizerVisitor : public InstVisitor { } else { Value *ShadowBase, *OriginBase; std::tie(ShadowBase, OriginBase) = getShadowOriginPtr( - &I, IRB, IRB.getInt8Ty(), Align::None(), /*isStore*/ true); + &I, IRB, IRB.getInt8Ty(), Align(1), /*isStore*/ true); Value *PoisonValue = IRB.getInt8(PoisonStack ? ClPoisonStackPattern : 0); IRB.CreateMemSet(ShadowBase, PoisonValue, Len, diff --git a/llvm/lib/Transforms/Utils/InlineFunction.cpp b/llvm/lib/Transforms/Utils/InlineFunction.cpp index 9e991ec20b58..b7080672f17a 100644 --- a/llvm/lib/Transforms/Utils/InlineFunction.cpp +++ b/llvm/lib/Transforms/Utils/InlineFunction.cpp @@ -1254,8 +1254,8 @@ static void HandleByValArgumentInit(Value *Dst, Value *Src, Module *M, // Always generate a memcpy of alignment 1 here because we don't know // the alignment of the src pointer. Other optimizations can infer // better alignment. - Builder.CreateMemCpy(Dst, /*DstAlign*/ Align::None(), Src, - /*SrcAlign*/ Align::None(), Size); + Builder.CreateMemCpy(Dst, /*DstAlign*/ Align(1), Src, + /*SrcAlign*/ Align(1), Size); } /// When inlining a call site that has a byval argument, diff --git a/llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp b/llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp index fa3a9d21f3df..c88e1180c08c 100644 --- a/llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp +++ b/llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp @@ -177,8 +177,7 @@ static bool canTransformToMemCmp(CallInst *CI, Value *Str, uint64_t Len, if (!isOnlyUsedInComparisonWithZero(CI)) return false; - if (!isDereferenceableAndAlignedPointer(Str, Align::None(), APInt(64, Len), - DL)) + if (!isDereferenceableAndAlignedPointer(Str, Align(1), APInt(64, Len), DL)) return false; if (CI->getFunction()->hasFnAttribute(Attribute::SanitizeMemory)) @@ -289,7 +288,7 @@ Value *LibCallSimplifier::emitStrLenMemCpy(Value *Src, Value *Dst, uint64_t Len, // We have enough information to now generate the memcpy call to do the // concatenation for us. Make a memcpy to copy the nul byte with align = 1. B.CreateMemCpy( - CpyDst, Align::None(), Src, Align::None(), + CpyDst, Align(1), Src, Align(1), ConstantInt::get(DL.getIntPtrType(Src->getContext()), Len + 1)); return Dst; } @@ -562,7 +561,7 @@ Value *LibCallSimplifier::optimizeStrCpy(CallInst *CI, IRBuilder<> &B) { // We have enough information to now generate the memcpy call to do the // copy for us. Make a memcpy to copy the nul byte with align = 1. CallInst *NewCI = - B.CreateMemCpy(Dst, Align::None(), Src, Align::None(), + B.CreateMemCpy(Dst, Align(1), Src, Align(1), ConstantInt::get(DL.getIntPtrType(CI->getContext()), Len)); NewCI->setAttributes(CI->getAttributes()); return Dst; @@ -590,8 +589,7 @@ Value *LibCallSimplifier::optimizeStpCpy(CallInst *CI, IRBuilder<> &B) { // We have enough information to now generate the memcpy call to do the // copy for us. Make a memcpy to copy the nul byte with align = 1. - CallInst *NewCI = - B.CreateMemCpy(Dst, Align::None(), Src, Align::None(), LenV); + CallInst *NewCI = B.CreateMemCpy(Dst, Align(1), Src, Align(1), LenV); NewCI->setAttributes(CI->getAttributes()); return DstEnd; } @@ -626,7 +624,7 @@ Value *LibCallSimplifier::optimizeStrNCpy(CallInst *CI, IRBuilder<> &B) { if (SrcLen == 0) { // strncpy(x, "", y) -> memset(align 1 x, '\0', y) - CallInst *NewCI = B.CreateMemSet(Dst, B.getInt8('\0'), Size, Align::None()); + CallInst *NewCI = B.CreateMemSet(Dst, B.getInt8('\0'), Size, Align(1)); AttrBuilder ArgAttrs(CI->getAttributes().getParamAttributes(0)); NewCI->setAttributes(NewCI->getAttributes().addParamAttributes( CI->getContext(), 0, ArgAttrs)); @@ -639,7 +637,7 @@ Value *LibCallSimplifier::optimizeStrNCpy(CallInst *CI, IRBuilder<> &B) { Type *PT = Callee->getFunctionType()->getParamType(0); // strncpy(x, s, c) -> memcpy(align 1 x, align 1 s, c) [s and c are constant] - CallInst *NewCI = B.CreateMemCpy(Dst, Align::None(), Src, Align::None(), + CallInst *NewCI = B.CreateMemCpy(Dst, Align(1), Src, Align(1), ConstantInt::get(DL.getIntPtrType(PT), Len)); NewCI->setAttributes(CI->getAttributes()); return Dst; @@ -1116,8 +1114,8 @@ Value *LibCallSimplifier::optimizeMemCpy(CallInst *CI, IRBuilder<> &B) { return nullptr; // memcpy(x, y, n) -> llvm.memcpy(align 1 x, align 1 y, n) - CallInst *NewCI = B.CreateMemCpy(CI->getArgOperand(0), Align::None(), - CI->getArgOperand(1), Align::None(), Size); + CallInst *NewCI = B.CreateMemCpy(CI->getArgOperand(0), Align(1), + CI->getArgOperand(1), Align(1), Size); NewCI->setAttributes(CI->getAttributes()); return CI->getArgOperand(0); } @@ -1146,8 +1144,7 @@ Value *LibCallSimplifier::optimizeMemCCpy(CallInst *CI, IRBuilder<> &B) { size_t Pos = SrcStr.find(StopChar->getSExtValue() & 0xFF); if (Pos == StringRef::npos) { if (N->getZExtValue() <= SrcStr.size()) { - B.CreateMemCpy(Dst, Align::None(), Src, Align::None(), - CI->getArgOperand(3)); + B.CreateMemCpy(Dst, Align(1), Src, Align(1), CI->getArgOperand(3)); return Constant::getNullValue(CI->getType()); } return nullptr; @@ -1156,7 +1153,7 @@ Value *LibCallSimplifier::optimizeMemCCpy(CallInst *CI, IRBuilder<> &B) { Value *NewN = ConstantInt::get(N->getType(), std::min(uint64_t(Pos + 1), N->getZExtValue())); // memccpy -> llvm.memcpy - B.CreateMemCpy(Dst, Align::None(), Src, Align::None(), NewN); + B.CreateMemCpy(Dst, Align(1), Src, Align(1), NewN); return Pos + 1 <= N->getZExtValue() ? B.CreateInBoundsGEP(B.getInt8Ty(), Dst, NewN) : Constant::getNullValue(CI->getType()); @@ -1166,8 +1163,8 @@ Value *LibCallSimplifier::optimizeMemPCpy(CallInst *CI, IRBuilder<> &B) { Value *Dst = CI->getArgOperand(0); Value *N = CI->getArgOperand(2); // mempcpy(x, y, n) -> llvm.memcpy(align 1 x, align 1 y, n), x + n - CallInst *NewCI = B.CreateMemCpy(Dst, Align::None(), CI->getArgOperand(1), - Align::None(), N); + CallInst *NewCI = + B.CreateMemCpy(Dst, Align(1), CI->getArgOperand(1), Align(1), N); NewCI->setAttributes(CI->getAttributes()); return B.CreateInBoundsGEP(B.getInt8Ty(), Dst, N); } @@ -1179,8 +1176,8 @@ Value *LibCallSimplifier::optimizeMemMove(CallInst *CI, IRBuilder<> &B) { return nullptr; // memmove(x, y, n) -> llvm.memmove(align 1 x, align 1 y, n) - CallInst *NewCI = B.CreateMemMove(CI->getArgOperand(0), Align::None(), - CI->getArgOperand(1), Align::None(), Size); + CallInst *NewCI = B.CreateMemMove(CI->getArgOperand(0), Align(1), + CI->getArgOperand(1), Align(1), Size); NewCI->setAttributes(CI->getAttributes()); return CI->getArgOperand(0); } @@ -1240,8 +1237,7 @@ Value *LibCallSimplifier::optimizeMemSet(CallInst *CI, IRBuilder<> &B) { // memset(p, v, n) -> llvm.memset(align 1 p, v, n) Value *Val = B.CreateIntCast(CI->getArgOperand(1), B.getInt8Ty(), false); - CallInst *NewCI = - B.CreateMemSet(CI->getArgOperand(0), Val, Size, Align::None()); + CallInst *NewCI = B.CreateMemSet(CI->getArgOperand(0), Val, Size, Align(1)); NewCI->setAttributes(CI->getAttributes()); return CI->getArgOperand(0); } @@ -2477,8 +2473,7 @@ Value *LibCallSimplifier::optimizeSPrintFString(CallInst *CI, IRBuilder<> &B) { // sprintf(str, fmt) -> llvm.memcpy(align 1 str, align 1 fmt, strlen(fmt)+1) B.CreateMemCpy( - CI->getArgOperand(0), Align::None(), CI->getArgOperand(1), - Align::None(), + CI->getArgOperand(0), Align(1), CI->getArgOperand(1), Align(1), ConstantInt::get(DL.getIntPtrType(CI->getContext()), FormatStr.size() + 1)); // Copy the null byte. return ConstantInt::get(CI->getType(), FormatStr.size()); @@ -2515,8 +2510,8 @@ Value *LibCallSimplifier::optimizeSPrintFString(CallInst *CI, IRBuilder<> &B) { return nullptr; Value *IncLen = B.CreateAdd(Len, ConstantInt::get(Len->getType(), 1), "leninc"); - B.CreateMemCpy(CI->getArgOperand(0), Align::None(), CI->getArgOperand(2), - Align::None(), IncLen); + B.CreateMemCpy(CI->getArgOperand(0), Align(1), CI->getArgOperand(2), + Align(1), IncLen); // The sprintf result is the unincremented number of bytes in the string. return B.CreateIntCast(Len, CI->getType(), false); @@ -2587,8 +2582,7 @@ Value *LibCallSimplifier::optimizeSnPrintFString(CallInst *CI, IRBuilder<> &B) { // snprintf(dst, size, fmt) -> llvm.memcpy(align 1 dst, align 1 fmt, // strlen(fmt)+1) B.CreateMemCpy( - CI->getArgOperand(0), Align::None(), CI->getArgOperand(2), - Align::None(), + CI->getArgOperand(0), Align(1), CI->getArgOperand(2), Align(1), ConstantInt::get(DL.getIntPtrType(CI->getContext()), FormatStr.size() + 1)); // Copy the null byte. return ConstantInt::get(CI->getType(), FormatStr.size()); @@ -2629,9 +2623,8 @@ Value *LibCallSimplifier::optimizeSnPrintFString(CallInst *CI, IRBuilder<> &B) { else if (N < Str.size() + 1) return nullptr; - B.CreateMemCpy(CI->getArgOperand(0), Align::None(), CI->getArgOperand(3), - Align::None(), - ConstantInt::get(CI->getType(), Str.size() + 1)); + B.CreateMemCpy(CI->getArgOperand(0), Align(1), CI->getArgOperand(3), + Align(1), ConstantInt::get(CI->getType(), Str.size() + 1)); // The snprintf result is the unincremented number of bytes in the string. return ConstantInt::get(CI->getType(), Str.size()); @@ -2848,9 +2841,8 @@ Value *LibCallSimplifier::optimizePuts(CallInst *CI, IRBuilder<> &B) { Value *LibCallSimplifier::optimizeBCopy(CallInst *CI, IRBuilder<> &B) { // bcopy(src, dst, n) -> llvm.memmove(dst, src, n) - return B.CreateMemMove(CI->getArgOperand(1), Align::None(), - CI->getArgOperand(0), Align::None(), - CI->getArgOperand(2)); + return B.CreateMemMove(CI->getArgOperand(1), Align(1), CI->getArgOperand(0), + Align(1), CI->getArgOperand(2)); } bool LibCallSimplifier::hasFloatVersion(StringRef FuncName) { @@ -3282,9 +3274,9 @@ FortifiedLibCallSimplifier::isFortifiedCallFoldable(CallInst *CI, Value *FortifiedLibCallSimplifier::optimizeMemCpyChk(CallInst *CI, IRBuilder<> &B) { if (isFortifiedCallFoldable(CI, 3, 2)) { - CallInst *NewCI = B.CreateMemCpy(CI->getArgOperand(0), Align::None(), - CI->getArgOperand(1), Align::None(), - CI->getArgOperand(2)); + CallInst *NewCI = + B.CreateMemCpy(CI->getArgOperand(0), Align(1), CI->getArgOperand(1), + Align(1), CI->getArgOperand(2)); NewCI->setAttributes(CI->getAttributes()); return CI->getArgOperand(0); } @@ -3294,9 +3286,9 @@ Value *FortifiedLibCallSimplifier::optimizeMemCpyChk(CallInst *CI, Value *FortifiedLibCallSimplifier::optimizeMemMoveChk(CallInst *CI, IRBuilder<> &B) { if (isFortifiedCallFoldable(CI, 3, 2)) { - CallInst *NewCI = B.CreateMemMove(CI->getArgOperand(0), Align::None(), - CI->getArgOperand(1), Align::None(), - CI->getArgOperand(2)); + CallInst *NewCI = + B.CreateMemMove(CI->getArgOperand(0), Align(1), CI->getArgOperand(1), + Align(1), CI->getArgOperand(2)); NewCI->setAttributes(CI->getAttributes()); return CI->getArgOperand(0); } @@ -3310,7 +3302,7 @@ Value *FortifiedLibCallSimplifier::optimizeMemSetChk(CallInst *CI, if (isFortifiedCallFoldable(CI, 3, 2)) { Value *Val = B.CreateIntCast(CI->getArgOperand(1), B.getInt8Ty(), false); CallInst *NewCI = B.CreateMemSet(CI->getArgOperand(0), Val, - CI->getArgOperand(2), Align::None()); + CI->getArgOperand(2), Align(1)); NewCI->setAttributes(CI->getAttributes()); return CI->getArgOperand(0); } diff --git a/llvm/unittests/Support/AlignmentTest.cpp b/llvm/unittests/Support/AlignmentTest.cpp index cbd0856f0b76..07694cec6832 100644 --- a/llvm/unittests/Support/AlignmentTest.cpp +++ b/llvm/unittests/Support/AlignmentTest.cpp @@ -52,7 +52,6 @@ std::vector getValidAlignments() { TEST(AlignmentTest, AlignDefaultCTor) { EXPECT_EQ(Align().value(), 1ULL); - EXPECT_EQ(Align::None().value(), 1ULL); } TEST(AlignmentTest, MaybeAlignDefaultCTor) { diff --git a/polly/lib/CodeGen/LoopGeneratorsKMP.cpp b/polly/lib/CodeGen/LoopGeneratorsKMP.cpp index c52f947a7246..e57205107f9a 100644 --- a/polly/lib/CodeGen/LoopGeneratorsKMP.cpp +++ b/polly/lib/CodeGen/LoopGeneratorsKMP.cpp @@ -468,7 +468,7 @@ GlobalVariable *ParallelLoopGeneratorKMP::createSourceLocation() { // Global Variable Definitions GlobalVariable *StrVar = new GlobalVariable( *M, ArrayType, true, GlobalValue::PrivateLinkage, 0, ".str.ident"); - StrVar->setAlignment(llvm::Align::None()); + StrVar->setAlignment(llvm::Align(1)); SourceLocDummy = new GlobalVariable( *M, IdentTy, true, GlobalValue::PrivateLinkage, nullptr, LocName);