forked from OSchip/llvm-project
tsan: switch to new memory_order constants (ABI compatible)
llvm-svn: 167614
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571df35397
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@ -39,12 +39,12 @@ typedef __tsan_atomic8 a8;
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typedef __tsan_atomic16 a16;
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typedef __tsan_atomic32 a32;
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typedef __tsan_atomic64 a64;
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const int mo_relaxed = __tsan_memory_order_relaxed;
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const int mo_consume = __tsan_memory_order_consume;
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const int mo_acquire = __tsan_memory_order_acquire;
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const int mo_release = __tsan_memory_order_release;
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const int mo_acq_rel = __tsan_memory_order_acq_rel;
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const int mo_seq_cst = __tsan_memory_order_seq_cst;
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const morder mo_relaxed = __tsan_memory_order_relaxed;
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const morder mo_consume = __tsan_memory_order_consume;
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const morder mo_acquire = __tsan_memory_order_acquire;
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const morder mo_release = __tsan_memory_order_release;
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const morder mo_acq_rel = __tsan_memory_order_acq_rel;
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const morder mo_seq_cst = __tsan_memory_order_seq_cst;
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static void AtomicStatInc(ThreadState *thr, uptr size, morder mo, StatType t) {
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StatInc(thr, StatAtomic);
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@ -79,8 +79,29 @@ static bool IsAcquireOrder(morder mo) {
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|| mo == mo_acq_rel || mo == mo_seq_cst;
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}
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static morder ConvertOrder(morder mo) {
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if (mo > (morder)100500) {
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mo = morder(mo - 100500);
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if (mo == morder(1 << 0))
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mo = mo_relaxed;
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else if (mo == morder(1 << 1))
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mo = mo_consume;
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else if (mo == morder(1 << 2))
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mo = mo_acquire;
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else if (mo == morder(1 << 3))
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mo = mo_release;
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else if (mo == morder(1 << 4))
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mo = mo_acq_rel;
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else if (mo == morder(1 << 5))
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mo = mo_seq_cst;
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}
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CHECK_GE(mo, mo_relaxed);
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CHECK_LE(mo, mo_seq_cst);
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return mo;
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}
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#define SCOPED_ATOMIC(func, ...) \
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if ((u32)mo > 100500) mo = (morder)((u32)mo - 100500); \
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mo = ConvertOrder(mo); \
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mo = flags()->force_seq_cst_atomics ? (morder)mo_seq_cst : mo; \
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ThreadState *const thr = cur_thread(); \
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const uptr pc = (uptr)__builtin_return_address(0); \
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@ -25,12 +25,12 @@ typedef long __tsan_atomic64; // NOLINT
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// Part of ABI, do not change.
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// http://llvm.org/viewvc/llvm-project/libcxx/trunk/include/atomic?view=markup
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typedef enum {
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__tsan_memory_order_relaxed = 1 << 0,
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__tsan_memory_order_consume = 1 << 1,
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__tsan_memory_order_acquire = 1 << 2,
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__tsan_memory_order_release = 1 << 3,
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__tsan_memory_order_acq_rel = 1 << 4,
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__tsan_memory_order_seq_cst = 1 << 5
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__tsan_memory_order_relaxed,
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__tsan_memory_order_consume,
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__tsan_memory_order_acquire,
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__tsan_memory_order_release,
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__tsan_memory_order_acq_rel,
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__tsan_memory_order_seq_cst
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} __tsan_memory_order;
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__tsan_atomic8 __tsan_atomic8_load(const volatile __tsan_atomic8 *a,
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