forked from OSchip/llvm-project
[lldb][ARM/AArch64] Update disasm flags to latest v8.7a ISA
Add optional memory tagging extension on AArch64. Use isAArch64() instead of listing the AArch64 triples, which fixes us not recognising aarch64_be. Reviewed By: omjavaid Differential Revision: https://reviews.llvm.org/D94084
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@ -1056,7 +1056,7 @@ DisassemblerLLVMC::DisassemblerLLVMC(const ArchSpec &arch,
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thumb_arch_name.erase(0, 3);
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thumb_arch_name.insert(0, "thumb");
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} else {
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thumb_arch_name = "thumbv8.2a";
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thumb_arch_name = "thumbv8.7a";
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}
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thumb_arch.GetTriple().setArchName(llvm::StringRef(thumb_arch_name));
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}
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@ -1068,7 +1068,7 @@ DisassemblerLLVMC::DisassemblerLLVMC(const ArchSpec &arch,
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// specified)
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if (triple.getArch() == llvm::Triple::arm &&
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triple.getSubArch() == llvm::Triple::NoSubArch)
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triple.setArchName("armv8.2a");
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triple.setArchName("armv8.7a");
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std::string features_str = "";
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const char *triple_str = triple.getTriple().c_str();
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@ -1137,16 +1137,13 @@ DisassemblerLLVMC::DisassemblerLLVMC(const ArchSpec &arch,
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features_str += "+dspr2,";
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}
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// If any AArch64 variant, enable the ARMv8.5 ISA with SVE extensions so we
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// can disassemble newer instructions.
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if (triple.getArch() == llvm::Triple::aarch64 ||
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triple.getArch() == llvm::Triple::aarch64_32)
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features_str += "+v8.5a,+sve2";
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// If any AArch64 variant, enable latest ISA with any optional
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// extensions like SVE.
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if (triple.isAArch64()) {
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features_str += "+v8.7a,+sve2,+mte";
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if ((triple.getArch() == llvm::Triple::aarch64 ||
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triple.getArch() == llvm::Triple::aarch64_32)
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&& triple.getVendor() == llvm::Triple::Apple) {
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cpu = "apple-latest";
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if (triple.getVendor() == llvm::Triple::Apple)
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cpu = "apple-latest";
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}
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// We use m_disasm_up.get() to tell whether we are valid or not, so if this
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