forked from OSchip/llvm-project
Enhance induction variable code to remove the
sext around sext(shorter IV + constant), using a longer IV instead, when it can figure out the add can't overflow. This comes up a lot in subscripting; mainly affects 64 bit. llvm-svn: 69123
This commit is contained in:
parent
ffb83a155e
commit
7ffb7d5728
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@ -467,8 +467,12 @@ static const Type *getEffectiveIndvarType(const PHINode *Phi) {
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/// whether an induction variable in the same type that starts
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/// at 0 would undergo signed overflow.
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///
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/// In addition to setting the NoSignedWrap, and NoUnsignedWrap,
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/// variables, return the PHI for this induction variable.
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/// In addition to setting the NoSignedWrap and NoUnsignedWrap
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/// variables to true when appropriate (they are not set to false here),
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/// return the PHI for this induction variable. Also record the initial
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/// and final values and the increment; these are not meaningful unless
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/// either NoSignedWrap or NoUnsignedWrap is true, and are always meaningful
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/// in that case, although the final value may be 0 indicating a nonconstant.
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///
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/// TODO: This duplicates a fair amount of ScalarEvolution logic.
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/// Perhaps this can be merged with
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@ -479,7 +483,10 @@ static const PHINode *TestOrigIVForWrap(const Loop *L,
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const BranchInst *BI,
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const Instruction *OrigCond,
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bool &NoSignedWrap,
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bool &NoUnsignedWrap) {
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bool &NoUnsignedWrap,
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const ConstantInt* &InitialVal,
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const ConstantInt* &IncrVal,
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const ConstantInt* &LimitVal) {
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// Verify that the loop is sane and find the exit condition.
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const ICmpInst *Cmp = dyn_cast<ICmpInst>(OrigCond);
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if (!Cmp) return 0;
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@ -542,31 +549,31 @@ static const PHINode *TestOrigIVForWrap(const Loop *L,
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// Get the increment instruction. Look past casts if we will
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// be able to prove that the original induction variable doesn't
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// undergo signed or unsigned overflow, respectively.
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const Value *IncrVal = CmpLHS;
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const Value *IncrInst = CmpLHS;
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if (isSigned) {
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if (const SExtInst *SI = dyn_cast<SExtInst>(CmpLHS)) {
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if (!isa<ConstantInt>(CmpRHS) ||
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!cast<ConstantInt>(CmpRHS)->getValue()
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.isSignedIntN(IncrVal->getType()->getPrimitiveSizeInBits()))
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.isSignedIntN(IncrInst->getType()->getPrimitiveSizeInBits()))
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return 0;
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IncrVal = SI->getOperand(0);
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IncrInst = SI->getOperand(0);
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}
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} else {
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if (const ZExtInst *ZI = dyn_cast<ZExtInst>(CmpLHS)) {
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if (!isa<ConstantInt>(CmpRHS) ||
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!cast<ConstantInt>(CmpRHS)->getValue()
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.isIntN(IncrVal->getType()->getPrimitiveSizeInBits()))
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.isIntN(IncrInst->getType()->getPrimitiveSizeInBits()))
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return 0;
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IncrVal = ZI->getOperand(0);
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IncrInst = ZI->getOperand(0);
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}
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}
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// For now, only analyze induction variables that have simple increments.
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const BinaryOperator *IncrOp = dyn_cast<BinaryOperator>(IncrVal);
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if (!IncrOp ||
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IncrOp->getOpcode() != Instruction::Add ||
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!isa<ConstantInt>(IncrOp->getOperand(1)) ||
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!cast<ConstantInt>(IncrOp->getOperand(1))->equalsInt(1))
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const BinaryOperator *IncrOp = dyn_cast<BinaryOperator>(IncrInst);
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if (!IncrOp || IncrOp->getOpcode() != Instruction::Add)
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return 0;
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IncrVal = dyn_cast<ConstantInt>(IncrOp->getOperand(1));
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if (!IncrVal)
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return 0;
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// Make sure the PHI looks like a normal IV.
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@ -584,21 +591,78 @@ static const PHINode *TestOrigIVForWrap(const Loop *L,
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// For now, only analyze loops with a constant start value, so that
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// we can easily determine if the start value is not a maximum value
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// which would wrap on the first iteration.
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const ConstantInt *InitialVal =
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dyn_cast<ConstantInt>(PN->getIncomingValue(IncomingEdge));
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InitialVal = dyn_cast<ConstantInt>(PN->getIncomingValue(IncomingEdge));
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if (!InitialVal)
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return 0;
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// The original induction variable will start at some non-max value,
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// it counts up by one, and the loop iterates only while it remans
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// less than some value in the same type. As such, it will never wrap.
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// The upper limit need not be a constant; we'll check later.
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LimitVal = dyn_cast<ConstantInt>(CmpRHS);
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// We detect the impossibility of wrapping in two cases, both of
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// which require starting with a non-max value:
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// - The IV counts up by one, and the loop iterates only while it remains
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// less than a limiting value (any) in the same type.
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// - The IV counts up by a positive increment other than 1, and the
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// constant limiting value + the increment is less than the max value
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// (computed as max-increment to avoid overflow)
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if (isSigned && !InitialVal->getValue().isMaxSignedValue()) {
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NoSignedWrap = true;
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} else if (!isSigned && !InitialVal->getValue().isMaxValue())
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NoUnsignedWrap = true;
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if (IncrVal->equalsInt(1))
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NoSignedWrap = true; // LimitVal need not be constant
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else if (LimitVal) {
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uint64_t numBits = LimitVal->getValue().getBitWidth();
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if (IncrVal->getValue().sgt(APInt::getNullValue(numBits)) &&
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(APInt::getSignedMaxValue(numBits) - IncrVal->getValue())
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.sgt(LimitVal->getValue()))
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NoSignedWrap = true;
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}
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} else if (!isSigned && !InitialVal->getValue().isMaxValue()) {
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if (IncrVal->equalsInt(1))
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NoUnsignedWrap = true; // LimitVal need not be constant
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else if (LimitVal) {
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uint64_t numBits = LimitVal->getValue().getBitWidth();
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if (IncrVal->getValue().ugt(APInt::getNullValue(numBits)) &&
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(APInt::getMaxValue(numBits) - IncrVal->getValue())
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.ugt(LimitVal->getValue()))
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NoUnsignedWrap = true;
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}
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}
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return PN;
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}
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static Value *getSignExtendedTruncVar(const SCEVAddRecExpr *AR,
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ScalarEvolution *SE,
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const Type *LargestType, Loop *L,
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const Type *myType,
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SCEVExpander &Rewriter,
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BasicBlock::iterator InsertPt) {
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SCEVHandle ExtendedStart =
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SE->getSignExtendExpr(AR->getStart(), LargestType);
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SCEVHandle ExtendedStep =
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SE->getSignExtendExpr(AR->getStepRecurrence(*SE), LargestType);
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SCEVHandle ExtendedAddRec =
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SE->getAddRecExpr(ExtendedStart, ExtendedStep, L);
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if (LargestType != myType)
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ExtendedAddRec = SE->getTruncateExpr(ExtendedAddRec, myType);
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return Rewriter.expandCodeFor(ExtendedAddRec, InsertPt);
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}
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static Value *getZeroExtendedTruncVar(const SCEVAddRecExpr *AR,
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ScalarEvolution *SE,
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const Type *LargestType, Loop *L,
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const Type *myType,
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SCEVExpander &Rewriter,
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BasicBlock::iterator InsertPt) {
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SCEVHandle ExtendedStart =
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SE->getZeroExtendExpr(AR->getStart(), LargestType);
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SCEVHandle ExtendedStep =
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SE->getZeroExtendExpr(AR->getStepRecurrence(*SE), LargestType);
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SCEVHandle ExtendedAddRec =
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SE->getAddRecExpr(ExtendedStart, ExtendedStep, L);
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if (LargestType != myType)
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ExtendedAddRec = SE->getTruncateExpr(ExtendedAddRec, myType);
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return Rewriter.expandCodeFor(ExtendedAddRec, InsertPt);
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}
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bool IndVarSimplify::runOnLoop(Loop *L, LPPassManager &LPM) {
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LI = &getAnalysis<LoopInfo>();
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SE = &getAnalysis<ScalarEvolution>();
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@ -680,6 +744,7 @@ bool IndVarSimplify::runOnLoop(Loop *L, LPPassManager &LPM) {
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// using it. We can currently only handle loops with a single exit.
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bool NoSignedWrap = false;
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bool NoUnsignedWrap = false;
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const ConstantInt* InitialVal, * IncrVal, * LimitVal;
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const PHINode *OrigControllingPHI = 0;
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if (!isa<SCEVCouldNotCompute>(BackedgeTakenCount) && ExitingBlock)
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// Can't rewrite non-branch yet.
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@ -688,7 +753,8 @@ bool IndVarSimplify::runOnLoop(Loop *L, LPPassManager &LPM) {
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// Determine if the OrigIV will ever undergo overflow.
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OrigControllingPHI =
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TestOrigIVForWrap(L, BI, OrigCond,
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NoSignedWrap, NoUnsignedWrap);
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NoSignedWrap, NoUnsignedWrap,
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InitialVal, IncrVal, LimitVal);
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// We'll be replacing the original condition, so it'll be dead.
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DeadInsts.insert(OrigCond);
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@ -733,29 +799,44 @@ bool IndVarSimplify::runOnLoop(Loop *L, LPPassManager &LPM) {
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for (Value::use_iterator UI = PN->use_begin(), UE = PN->use_end();
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UI != UE; ++UI) {
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if (isa<SExtInst>(UI) && NoSignedWrap) {
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SCEVHandle ExtendedStart =
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SE->getSignExtendExpr(AR->getStart(), LargestType);
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SCEVHandle ExtendedStep =
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SE->getSignExtendExpr(AR->getStepRecurrence(*SE), LargestType);
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SCEVHandle ExtendedAddRec =
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SE->getAddRecExpr(ExtendedStart, ExtendedStep, L);
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if (LargestType != UI->getType())
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ExtendedAddRec = SE->getTruncateExpr(ExtendedAddRec, UI->getType());
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Value *TruncIndVar = Rewriter.expandCodeFor(ExtendedAddRec, InsertPt);
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Value *TruncIndVar = getSignExtendedTruncVar(AR, SE, LargestType, L,
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UI->getType(), Rewriter, InsertPt);
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UI->replaceAllUsesWith(TruncIndVar);
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if (Instruction *DeadUse = dyn_cast<Instruction>(*UI))
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DeadInsts.insert(DeadUse);
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}
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// See if we can figure out sext(i+constant) doesn't wrap, so we can
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// use a larger add. This is common in subscripting.
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Instruction *UInst = dyn_cast<Instruction>(*UI);
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if (UInst && UInst->getOpcode()==Instruction::Add &&
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UInst->hasOneUse() &&
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isa<ConstantInt>(UInst->getOperand(1)) &&
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isa<SExtInst>(UInst->use_begin()) && NoSignedWrap && LimitVal) {
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uint64_t numBits = LimitVal->getValue().getBitWidth();
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ConstantInt* RHS = dyn_cast<ConstantInt>(UInst->getOperand(1));
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if (((APInt::getSignedMaxValue(numBits) - IncrVal->getValue()) -
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RHS->getValue()).sgt(LimitVal->getValue())) {
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SExtInst* oldSext = dyn_cast<SExtInst>(UInst->use_begin());
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Value *TruncIndVar = getSignExtendedTruncVar(AR, SE, LargestType, L,
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oldSext->getType(), Rewriter,
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InsertPt);
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APInt APcopy = APInt(RHS->getValue());
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ConstantInt* newRHS =
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ConstantInt::get(APcopy.sext(oldSext->getType()->
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getPrimitiveSizeInBits()));
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Value *NewAdd = BinaryOperator::CreateAdd(TruncIndVar, newRHS,
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UInst->getName()+".nosex",
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UInst);
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oldSext->replaceAllUsesWith(NewAdd);
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if (Instruction *DeadUse = dyn_cast<Instruction>(oldSext))
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DeadInsts.insert(DeadUse);
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if (Instruction *DeadUse = dyn_cast<Instruction>(UInst))
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DeadInsts.insert(DeadUse);
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}
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}
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if (isa<ZExtInst>(UI) && NoUnsignedWrap) {
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SCEVHandle ExtendedStart =
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SE->getZeroExtendExpr(AR->getStart(), LargestType);
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SCEVHandle ExtendedStep =
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SE->getZeroExtendExpr(AR->getStepRecurrence(*SE), LargestType);
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SCEVHandle ExtendedAddRec =
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SE->getAddRecExpr(ExtendedStart, ExtendedStep, L);
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if (LargestType != UI->getType())
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ExtendedAddRec = SE->getTruncateExpr(ExtendedAddRec, UI->getType());
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Value *TruncIndVar = Rewriter.expandCodeFor(ExtendedAddRec, InsertPt);
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Value *TruncIndVar = getZeroExtendedTruncVar(AR, SE, LargestType, L,
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UI->getType(), Rewriter, InsertPt);
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UI->replaceAllUsesWith(TruncIndVar);
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if (Instruction *DeadUse = dyn_cast<Instruction>(*UI))
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DeadInsts.insert(DeadUse);
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@ -0,0 +1,114 @@
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; RUN: llvm-as < %s | opt -indvars | llvm-dis | not grep {sext}
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; ModuleID = '<stdin>'
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
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target triple = "x86_64-apple-darwin9.6"
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@a = external global i32* ; <i32**> [#uses=3]
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@b = external global i32* ; <i32**> [#uses=3]
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@c = external global i32* ; <i32**> [#uses=3]
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@d = external global i32* ; <i32**> [#uses=3]
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@e = external global i32* ; <i32**> [#uses=3]
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@f = external global i32* ; <i32**> [#uses=3]
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define void @foo() nounwind {
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bb1.thread:
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br label %bb1
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bb1: ; preds = %bb1, %bb1.thread
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%i.0.reg2mem.0 = phi i32 [ 0, %bb1.thread ], [ %84, %bb1 ] ; <i32> [#uses=19]
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%0 = load i32** @a, align 8 ; <i32*> [#uses=1]
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%1 = load i32** @b, align 8 ; <i32*> [#uses=1]
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%2 = sext i32 %i.0.reg2mem.0 to i64 ; <i64> [#uses=1]
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%3 = getelementptr i32* %1, i64 %2 ; <i32*> [#uses=1]
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%4 = load i32* %3, align 1 ; <i32> [#uses=1]
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%5 = load i32** @c, align 8 ; <i32*> [#uses=1]
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%6 = sext i32 %i.0.reg2mem.0 to i64 ; <i64> [#uses=1]
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%7 = getelementptr i32* %5, i64 %6 ; <i32*> [#uses=1]
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%8 = load i32* %7, align 1 ; <i32> [#uses=1]
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%9 = add i32 %8, %4 ; <i32> [#uses=1]
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%10 = sext i32 %i.0.reg2mem.0 to i64 ; <i64> [#uses=1]
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%11 = getelementptr i32* %0, i64 %10 ; <i32*> [#uses=1]
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store i32 %9, i32* %11, align 1
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%12 = load i32** @a, align 8 ; <i32*> [#uses=1]
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%13 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
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%14 = load i32** @b, align 8 ; <i32*> [#uses=1]
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%15 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
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%16 = sext i32 %15 to i64 ; <i64> [#uses=1]
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%17 = getelementptr i32* %14, i64 %16 ; <i32*> [#uses=1]
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%18 = load i32* %17, align 1 ; <i32> [#uses=1]
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%19 = load i32** @c, align 8 ; <i32*> [#uses=1]
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%20 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
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%21 = sext i32 %20 to i64 ; <i64> [#uses=1]
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%22 = getelementptr i32* %19, i64 %21 ; <i32*> [#uses=1]
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%23 = load i32* %22, align 1 ; <i32> [#uses=1]
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%24 = add i32 %23, %18 ; <i32> [#uses=1]
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%25 = sext i32 %13 to i64 ; <i64> [#uses=1]
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%26 = getelementptr i32* %12, i64 %25 ; <i32*> [#uses=1]
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store i32 %24, i32* %26, align 1
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%27 = load i32** @a, align 8 ; <i32*> [#uses=1]
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%28 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
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%29 = load i32** @b, align 8 ; <i32*> [#uses=1]
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%30 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
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%31 = sext i32 %30 to i64 ; <i64> [#uses=1]
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%32 = getelementptr i32* %29, i64 %31 ; <i32*> [#uses=1]
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%33 = load i32* %32, align 1 ; <i32> [#uses=1]
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%34 = load i32** @c, align 8 ; <i32*> [#uses=1]
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%35 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
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%36 = sext i32 %35 to i64 ; <i64> [#uses=1]
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%37 = getelementptr i32* %34, i64 %36 ; <i32*> [#uses=1]
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%38 = load i32* %37, align 1 ; <i32> [#uses=1]
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%39 = add i32 %38, %33 ; <i32> [#uses=1]
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%40 = sext i32 %28 to i64 ; <i64> [#uses=1]
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%41 = getelementptr i32* %27, i64 %40 ; <i32*> [#uses=1]
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store i32 %39, i32* %41, align 1
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%42 = load i32** @d, align 8 ; <i32*> [#uses=1]
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%43 = load i32** @e, align 8 ; <i32*> [#uses=1]
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%44 = sext i32 %i.0.reg2mem.0 to i64 ; <i64> [#uses=1]
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%45 = getelementptr i32* %43, i64 %44 ; <i32*> [#uses=1]
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%46 = load i32* %45, align 1 ; <i32> [#uses=1]
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%47 = load i32** @f, align 8 ; <i32*> [#uses=1]
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%48 = sext i32 %i.0.reg2mem.0 to i64 ; <i64> [#uses=1]
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%49 = getelementptr i32* %47, i64 %48 ; <i32*> [#uses=1]
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%50 = load i32* %49, align 1 ; <i32> [#uses=1]
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%51 = add i32 %50, %46 ; <i32> [#uses=1]
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%52 = sext i32 %i.0.reg2mem.0 to i64 ; <i64> [#uses=1]
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%53 = getelementptr i32* %42, i64 %52 ; <i32*> [#uses=1]
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store i32 %51, i32* %53, align 1
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%54 = load i32** @d, align 8 ; <i32*> [#uses=1]
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%55 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
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%56 = load i32** @e, align 8 ; <i32*> [#uses=1]
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%57 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
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%58 = sext i32 %57 to i64 ; <i64> [#uses=1]
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%59 = getelementptr i32* %56, i64 %58 ; <i32*> [#uses=1]
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%60 = load i32* %59, align 1 ; <i32> [#uses=1]
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%61 = load i32** @f, align 8 ; <i32*> [#uses=1]
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%62 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
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%63 = sext i32 %62 to i64 ; <i64> [#uses=1]
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%64 = getelementptr i32* %61, i64 %63 ; <i32*> [#uses=1]
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%65 = load i32* %64, align 1 ; <i32> [#uses=1]
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%66 = add i32 %65, %60 ; <i32> [#uses=1]
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%67 = sext i32 %55 to i64 ; <i64> [#uses=1]
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%68 = getelementptr i32* %54, i64 %67 ; <i32*> [#uses=1]
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store i32 %66, i32* %68, align 1
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%69 = load i32** @d, align 8 ; <i32*> [#uses=1]
|
||||
%70 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
|
||||
%71 = load i32** @e, align 8 ; <i32*> [#uses=1]
|
||||
%72 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
|
||||
%73 = sext i32 %72 to i64 ; <i64> [#uses=1]
|
||||
%74 = getelementptr i32* %71, i64 %73 ; <i32*> [#uses=1]
|
||||
%75 = load i32* %74, align 1 ; <i32> [#uses=1]
|
||||
%76 = load i32** @f, align 8 ; <i32*> [#uses=1]
|
||||
%77 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
|
||||
%78 = sext i32 %77 to i64 ; <i64> [#uses=1]
|
||||
%79 = getelementptr i32* %76, i64 %78 ; <i32*> [#uses=1]
|
||||
%80 = load i32* %79, align 1 ; <i32> [#uses=1]
|
||||
%81 = add i32 %80, %75 ; <i32> [#uses=1]
|
||||
%82 = sext i32 %70 to i64 ; <i64> [#uses=1]
|
||||
%83 = getelementptr i32* %69, i64 %82 ; <i32*> [#uses=1]
|
||||
store i32 %81, i32* %83, align 1
|
||||
%84 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=2]
|
||||
%85 = icmp sgt i32 %84, 23646 ; <i1> [#uses=1]
|
||||
br i1 %85, label %return, label %bb1
|
||||
|
||||
return: ; preds = %bb1
|
||||
ret void
|
||||
}
|
Loading…
Reference in New Issue