forked from OSchip/llvm-project
[MC] Move the reciprocal throughput computation from TargetSchedModel to MCSchedModel.
The goal is to make the reciprocal throughput computation accessible through the MCSchedModel interface. This is particularly important for llvm-mca because it can only query the MCSchedModel interface. No functional change intended. Differential Revision: https://reviews.llvm.org/D44392 llvm-svn: 327420
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@ -15,6 +15,7 @@
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#ifndef LLVM_MC_MCSCHEDULE_H
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#define LLVM_MC_MCSCHEDULE_H
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#include "llvm/ADT/Optional.h"
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#include "llvm/Support/DataTypes.h"
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#include <cassert>
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@ -231,6 +232,11 @@ struct MCSchedModel {
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static int computeInstrLatency(const MCSubtargetInfo &STI,
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const MCSchedClassDesc &SCDesc);
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/// Returns the reciprocal throughput information from a MCSchedClassDesc.
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static Optional<double>
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getReciprocalThroughput(const MCSubtargetInfo &STI,
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const MCSchedClassDesc &SCDesc);
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/// Returns the default initialized model.
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static const MCSchedModel &GetDefaultSchedModel() { return Default; }
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static const MCSchedModel Default;
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@ -347,38 +347,13 @@ getRThroughputFromItineraries(unsigned schedClass,
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return Throughput;
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}
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static Optional<double>
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getRThroughputFromInstrSchedModel(const MCSchedClassDesc *SCDesc,
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const TargetSubtargetInfo *STI,
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const MCSchedModel &SchedModel) {
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Optional<double> Throughput;
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for (const MCWriteProcResEntry *WPR = STI->getWriteProcResBegin(SCDesc),
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*WEnd = STI->getWriteProcResEnd(SCDesc);
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WPR != WEnd; ++WPR) {
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if (WPR->Cycles) {
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unsigned NumUnits =
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SchedModel.getProcResource(WPR->ProcResourceIdx)->NumUnits;
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double Temp = NumUnits * 1.0 / WPR->Cycles;
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Throughput = Throughput.hasValue()
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? std::min(Throughput.getValue(), Temp)
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: Temp;
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}
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}
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if (Throughput.hasValue())
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// We need reciprocal throughput that's why we return such value.
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return 1 / Throughput.getValue();
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return Throughput;
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}
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Optional<double>
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TargetSchedModel::computeInstrRThroughput(const MachineInstr *MI) const {
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if (hasInstrItineraries())
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return getRThroughputFromItineraries(MI->getDesc().getSchedClass(),
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getInstrItineraries());
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if (hasInstrSchedModel())
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return getRThroughputFromInstrSchedModel(resolveSchedClass(MI), STI,
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SchedModel);
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return MCSchedModel::getReciprocalThroughput(*STI, *resolveSchedClass(MI));
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return Optional<double>();
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}
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@ -388,9 +363,9 @@ TargetSchedModel::computeInstrRThroughput(unsigned Opcode) const {
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if (hasInstrItineraries())
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return getRThroughputFromItineraries(SchedClass, getInstrItineraries());
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if (hasInstrSchedModel()) {
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const MCSchedClassDesc *SCDesc = SchedModel.getSchedClassDesc(SchedClass);
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if (SCDesc->isValid() && !SCDesc->isVariant())
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return getRThroughputFromInstrSchedModel(SCDesc, STI, SchedModel);
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const MCSchedClassDesc &SCDesc = *SchedModel.getSchedClassDesc(SchedClass);
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if (SCDesc.isValid() && !SCDesc.isVariant())
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return MCSchedModel::getReciprocalThroughput(*STI, SCDesc);
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}
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return Optional<double>();
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}
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@ -49,3 +49,27 @@ int MCSchedModel::computeInstrLatency(const MCSubtargetInfo &STI,
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}
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return Latency;
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}
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Optional<double>
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MCSchedModel::getReciprocalThroughput(const MCSubtargetInfo &STI,
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const MCSchedClassDesc &SCDesc) {
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Optional<double> Throughput;
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const MCSchedModel &SchedModel = STI.getSchedModel();
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for (const MCWriteProcResEntry *WPR = STI.getWriteProcResBegin(&SCDesc),
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*WEnd = STI.getWriteProcResEnd(&SCDesc);
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WPR != WEnd; ++WPR) {
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if (WPR->Cycles) {
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unsigned NumUnits =
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SchedModel.getProcResource(WPR->ProcResourceIdx)->NumUnits;
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double Temp = NumUnits * 1.0 / WPR->Cycles;
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Throughput =
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Throughput.hasValue() ? std::min(Throughput.getValue(), Temp) : Temp;
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}
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}
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if (Throughput.hasValue())
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return 1 / Throughput.getValue();
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return Throughput;
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}
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