forked from OSchip/llvm-project
[AArch64][SVE2] Asm: add saturating multiply-add long instructions
Summary:
Patch adds support for indexed and unpredicated vectors forms of the
following instructions:
* SQDMLALB, SQDMLALT, SQDMLSLB, SQDMLSLT
The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest
Reviewed By: SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D61997
llvm-svn: 361005
This commit is contained in:
Cullen Rhodes
parent
151d4f88dc
commit
7f605c3550
|
|
@ -1097,6 +1097,18 @@ let Predicates = [HasSVE2] in {
|
|||
defm UMLSLB_ZZZ : sve2_int_mla_long<0b10110, "umlslb">;
|
||||
defm UMLSLT_ZZZ : sve2_int_mla_long<0b10111, "umlslt">;
|
||||
|
||||
// SVE2 saturating multiply-add long (indexed)
|
||||
defm SQDMLALB_ZZZI : sve2_int_mla_long_by_indexed_elem<0b0100, "sqdmlalb">;
|
||||
defm SQDMLALT_ZZZI : sve2_int_mla_long_by_indexed_elem<0b0101, "sqdmlalt">;
|
||||
defm SQDMLSLB_ZZZI : sve2_int_mla_long_by_indexed_elem<0b0110, "sqdmlslb">;
|
||||
defm SQDMLSLT_ZZZI : sve2_int_mla_long_by_indexed_elem<0b0111, "sqdmlslt">;
|
||||
|
||||
// SVE2 saturating multiply-add long (vectors, unpredicated)
|
||||
defm SQDMLALB_ZZZ : sve2_int_mla_long<0b11000, "sqdmlalb">;
|
||||
defm SQDMLALT_ZZZ : sve2_int_mla_long<0b11001, "sqdmlalt">;
|
||||
defm SQDMLSLB_ZZZ : sve2_int_mla_long<0b11010, "sqdmlslb">;
|
||||
defm SQDMLSLT_ZZZ : sve2_int_mla_long<0b11011, "sqdmlslt">;
|
||||
|
||||
// SVE2 integer multiply long
|
||||
defm SQDMULLB_ZZZ : sve2_wide_int_arith_long<0b11000, "sqdmullb">;
|
||||
defm SQDMULLT_ZZZ : sve2_wide_int_arith_long<0b11001, "sqdmullt">;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,116 @@
|
|||
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s
|
||||
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// z register out of range for index
|
||||
|
||||
sqdmlalb z0.s, z1.h, z8.h[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
|
||||
// CHECK-NEXT: sqdmlalb z0.s, z1.h, z8.h[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalb z0.d, z1.s, z16.s[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
|
||||
// CHECK-NEXT: sqdmlalb z0.d, z1.s, z16.s[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Index out of bounds
|
||||
|
||||
sqdmlalb z0.s, z1.h, z7.h[-1]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7].
|
||||
// CHECK-NEXT: sqdmlalb z0.s, z1.h, z7.h[-1]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalb z0.s, z1.h, z7.h[8]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7].
|
||||
// CHECK-NEXT: sqdmlalb z0.s, z1.h, z7.h[8]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalb z0.d, z1.s, z15.s[-1]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
|
||||
// CHECK-NEXT: sqdmlalb z0.d, z1.s, z15.s[-1]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalb z0.d, z1.s, z15.s[4]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
|
||||
// CHECK-NEXT: sqdmlalb z0.d, z1.s, z15.s[4]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Invalid element width
|
||||
|
||||
sqdmlalb z0.b, z1.b, z2.b
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalb z0.b, z1.b, z2.b
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalb z0.h, z1.h, z2.h
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalb z0.h, z1.h, z2.h
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalb z0.s, z1.s, z2.s
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalb z0.s, z1.s, z2.s
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalb z0.d, z1.d, z2.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalb z0.d, z1.d, z2.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalb z0.b, z1.b, z2.b[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalb z0.b, z1.b, z2.b[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalb z0.h, z1.h, z2.h[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalb z0.h, z1.h, z2.h[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalb z0.s, z1.b, z2.b[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalb z0.s, z1.b, z2.b[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalb z0.s, z1.s, z2.s[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalb z0.s, z1.s, z2.s[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalb z0.s, z1.d, z2.d[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalb z0.s, z1.d, z2.d[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalb z0.d, z1.b, z2.b[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalb z0.d, z1.b, z2.b[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalb z0.d, z1.h, z2.h[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalb z0.d, z1.h, z2.h[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalb z0.d, z1.d, z2.d[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalb z0.d, z1.d, z2.d[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
sqdmlalb z0.d, z1.s, z15.s
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
|
||||
// CHECK-NEXT: sqdmlalb z0.d, z1.s, z15.s
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
sqdmlalb z0.d, z1.s, z15.s[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
|
||||
// CHECK-NEXT: sqdmlalb z0.d, z1.s, z15.s[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
|
@ -0,0 +1,67 @@
|
|||
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
|
||||
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
|
||||
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
|
||||
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
|
||||
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
|
||||
// RUN: | llvm-objdump -d -mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
|
||||
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
|
||||
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
|
||||
|
||||
|
||||
sqdmlalb z0.h, z1.b, z31.b
|
||||
// CHECK-INST: sqdmlalb z0.h, z1.b, z31.b
|
||||
// CHECK-ENCODING: [0x20,0x60,0x5f,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 20 60 5f 44 <unknown>
|
||||
|
||||
sqdmlalb z0.s, z1.h, z31.h
|
||||
// CHECK-INST: sqdmlalb z0.s, z1.h, z31.h
|
||||
// CHECK-ENCODING: [0x20,0x60,0x9f,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 20 60 9f 44 <unknown>
|
||||
|
||||
sqdmlalb z0.d, z1.s, z31.s
|
||||
// CHECK-INST: sqdmlalb z0.d, z1.s, z31.s
|
||||
// CHECK-ENCODING: [0x20,0x60,0xdf,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 20 60 df 44 <unknown>
|
||||
|
||||
sqdmlalb z0.s, z1.h, z7.h[7]
|
||||
// CHECK-INST: sqdmlalb z0.s, z1.h, z7.h[7]
|
||||
// CHECK-ENCODING: [0x20,0x28,0xbf,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 20 28 bf 44 <unknown>
|
||||
|
||||
sqdmlalb z0.d, z1.s, z15.s[3]
|
||||
// CHECK-INST: sqdmlalb z0.d, z1.s, z15.s[3]
|
||||
// CHECK-ENCODING: [0x20,0x28,0xff,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 20 28 ff 44 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z21, z28
|
||||
// CHECK-INST: movprfx z21, z28
|
||||
// CHECK-ENCODING: [0x95,0xbf,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 95 bf 20 04 <unknown>
|
||||
|
||||
sqdmlalb z21.d, z1.s, z31.s
|
||||
// CHECK-INST: sqdmlalb z21.d, z1.s, z31.s
|
||||
// CHECK-ENCODING: [0x35,0x60,0xdf,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 35 60 df 44 <unknown>
|
||||
|
||||
movprfx z21, z28
|
||||
// CHECK-INST: movprfx z21, z28
|
||||
// CHECK-ENCODING: [0x95,0xbf,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 95 bf 20 04 <unknown>
|
||||
|
||||
sqdmlalb z21.d, z10.s, z5.s[1]
|
||||
// CHECK-INST: sqdmlalb z21.d, z10.s, z5.s[1]
|
||||
// CHECK-ENCODING: [0x55,0x29,0xe5,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 55 29 e5 44 <unknown>
|
||||
|
|
@ -0,0 +1,116 @@
|
|||
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s
|
||||
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// z register out of range for index
|
||||
|
||||
sqdmlalt z0.s, z1.h, z8.h[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
|
||||
// CHECK-NEXT: sqdmlalt z0.s, z1.h, z8.h[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalt z0.d, z1.s, z16.s[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
|
||||
// CHECK-NEXT: sqdmlalt z0.d, z1.s, z16.s[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Index out of bounds
|
||||
|
||||
sqdmlalt z0.s, z1.h, z7.h[-1]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7].
|
||||
// CHECK-NEXT: sqdmlalt z0.s, z1.h, z7.h[-1]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalt z0.s, z1.h, z7.h[8]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7].
|
||||
// CHECK-NEXT: sqdmlalt z0.s, z1.h, z7.h[8]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalt z0.d, z1.s, z15.s[-1]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
|
||||
// CHECK-NEXT: sqdmlalt z0.d, z1.s, z15.s[-1]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalt z0.d, z1.s, z15.s[4]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
|
||||
// CHECK-NEXT: sqdmlalt z0.d, z1.s, z15.s[4]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Invalid element width
|
||||
|
||||
sqdmlalt z0.b, z1.b, z2.b
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalt z0.b, z1.b, z2.b
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalt z0.h, z1.h, z2.h
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalt z0.h, z1.h, z2.h
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalt z0.s, z1.s, z2.s
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalt z0.s, z1.s, z2.s
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalt z0.d, z1.d, z2.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalt z0.d, z1.d, z2.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalt z0.b, z1.b, z2.b[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalt z0.b, z1.b, z2.b[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalt z0.h, z1.h, z2.h[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalt z0.h, z1.h, z2.h[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalt z0.s, z1.b, z2.b[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalt z0.s, z1.b, z2.b[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalt z0.s, z1.s, z2.s[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalt z0.s, z1.s, z2.s[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalt z0.s, z1.d, z2.d[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalt z0.s, z1.d, z2.d[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalt z0.d, z1.b, z2.b[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalt z0.d, z1.b, z2.b[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalt z0.d, z1.h, z2.h[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalt z0.d, z1.h, z2.h[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlalt z0.d, z1.d, z2.d[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlalt z0.d, z1.d, z2.d[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
sqdmlalt z0.d, z1.s, z15.s
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
|
||||
// CHECK-NEXT: sqdmlalt z0.d, z1.s, z15.s
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
sqdmlalt z0.d, z1.s, z15.s[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
|
||||
// CHECK-NEXT: sqdmlalt z0.d, z1.s, z15.s[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
|
@ -0,0 +1,67 @@
|
|||
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
|
||||
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
|
||||
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
|
||||
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
|
||||
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
|
||||
// RUN: | llvm-objdump -d -mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
|
||||
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
|
||||
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
|
||||
|
||||
|
||||
sqdmlalt z0.h, z1.b, z31.b
|
||||
// CHECK-INST: sqdmlalt z0.h, z1.b, z31.b
|
||||
// CHECK-ENCODING: [0x20,0x64,0x5f,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 20 64 5f 44 <unknown>
|
||||
|
||||
sqdmlalt z0.s, z1.h, z31.h
|
||||
// CHECK-INST: sqdmlalt z0.s, z1.h, z31.h
|
||||
// CHECK-ENCODING: [0x20,0x64,0x9f,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 20 64 9f 44 <unknown>
|
||||
|
||||
sqdmlalt z0.d, z1.s, z31.s
|
||||
// CHECK-INST: sqdmlalt z0.d, z1.s, z31.s
|
||||
// CHECK-ENCODING: [0x20,0x64,0xdf,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 20 64 df 44 <unknown>
|
||||
|
||||
sqdmlalt z0.s, z1.h, z7.h[7]
|
||||
// CHECK-INST: sqdmlalt z0.s, z1.h, z7.h[7]
|
||||
// CHECK-ENCODING: [0x20,0x2c,0xbf,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 20 2c bf 44 <unknown>
|
||||
|
||||
sqdmlalt z0.d, z1.s, z15.s[3]
|
||||
// CHECK-INST: sqdmlalt z0.d, z1.s, z15.s[3]
|
||||
// CHECK-ENCODING: [0x20,0x2c,0xff,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 20 2c ff 44 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z21, z28
|
||||
// CHECK-INST: movprfx z21, z28
|
||||
// CHECK-ENCODING: [0x95,0xbf,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 95 bf 20 04 <unknown>
|
||||
|
||||
sqdmlalt z21.d, z1.s, z31.s
|
||||
// CHECK-INST: sqdmlalt z21.d, z1.s, z31.s
|
||||
// CHECK-ENCODING: [0x35,0x64,0xdf,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 35 64 df 44 <unknown>
|
||||
|
||||
movprfx z21, z28
|
||||
// CHECK-INST: movprfx z21, z28
|
||||
// CHECK-ENCODING: [0x95,0xbf,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 95 bf 20 04 <unknown>
|
||||
|
||||
sqdmlalt z21.d, z10.s, z5.s[1]
|
||||
// CHECK-INST: sqdmlalt z21.d, z10.s, z5.s[1]
|
||||
// CHECK-ENCODING: [0x55,0x2d,0xe5,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 55 2d e5 44 <unknown>
|
||||
|
|
@ -0,0 +1,116 @@
|
|||
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s
|
||||
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// z register out of range for index
|
||||
|
||||
sqdmlslb z0.s, z1.h, z8.h[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
|
||||
// CHECK-NEXT: sqdmlslb z0.s, z1.h, z8.h[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslb z0.d, z1.s, z16.s[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
|
||||
// CHECK-NEXT: sqdmlslb z0.d, z1.s, z16.s[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Index out of bounds
|
||||
|
||||
sqdmlslb z0.s, z1.h, z7.h[-1]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7].
|
||||
// CHECK-NEXT: sqdmlslb z0.s, z1.h, z7.h[-1]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslb z0.s, z1.h, z7.h[8]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7].
|
||||
// CHECK-NEXT: sqdmlslb z0.s, z1.h, z7.h[8]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslb z0.d, z1.s, z15.s[-1]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
|
||||
// CHECK-NEXT: sqdmlslb z0.d, z1.s, z15.s[-1]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslb z0.d, z1.s, z15.s[4]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
|
||||
// CHECK-NEXT: sqdmlslb z0.d, z1.s, z15.s[4]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Invalid element width
|
||||
|
||||
sqdmlslb z0.b, z1.b, z2.b
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslb z0.b, z1.b, z2.b
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslb z0.h, z1.h, z2.h
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslb z0.h, z1.h, z2.h
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslb z0.s, z1.s, z2.s
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslb z0.s, z1.s, z2.s
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslb z0.d, z1.d, z2.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslb z0.d, z1.d, z2.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslb z0.b, z1.b, z2.b[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslb z0.b, z1.b, z2.b[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslb z0.h, z1.h, z2.h[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslb z0.h, z1.h, z2.h[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslb z0.s, z1.b, z2.b[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslb z0.s, z1.b, z2.b[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslb z0.s, z1.s, z2.s[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslb z0.s, z1.s, z2.s[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslb z0.s, z1.d, z2.d[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslb z0.s, z1.d, z2.d[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslb z0.d, z1.b, z2.b[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslb z0.d, z1.b, z2.b[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslb z0.d, z1.h, z2.h[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslb z0.d, z1.h, z2.h[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslb z0.d, z1.d, z2.d[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslb z0.d, z1.d, z2.d[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
sqdmlslb z0.d, z1.s, z15.s
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
|
||||
// CHECK-NEXT: sqdmlslb z0.d, z1.s, z15.s
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
sqdmlslb z0.d, z1.s, z15.s[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
|
||||
// CHECK-NEXT: sqdmlslb z0.d, z1.s, z15.s[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
|
@ -0,0 +1,67 @@
|
|||
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
|
||||
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
|
||||
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
|
||||
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
|
||||
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
|
||||
// RUN: | llvm-objdump -d -mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
|
||||
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
|
||||
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
|
||||
|
||||
|
||||
sqdmlslb z0.h, z1.b, z31.b
|
||||
// CHECK-INST: sqdmlslb z0.h, z1.b, z31.b
|
||||
// CHECK-ENCODING: [0x20,0x68,0x5f,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 20 68 5f 44 <unknown>
|
||||
|
||||
sqdmlslb z0.s, z1.h, z31.h
|
||||
// CHECK-INST: sqdmlslb z0.s, z1.h, z31.h
|
||||
// CHECK-ENCODING: [0x20,0x68,0x9f,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 20 68 9f 44 <unknown>
|
||||
|
||||
sqdmlslb z0.d, z1.s, z31.s
|
||||
// CHECK-INST: sqdmlslb z0.d, z1.s, z31.s
|
||||
// CHECK-ENCODING: [0x20,0x68,0xdf,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 20 68 df 44 <unknown>
|
||||
|
||||
sqdmlslb z0.s, z1.h, z7.h[7]
|
||||
// CHECK-INST: sqdmlslb z0.s, z1.h, z7.h[7]
|
||||
// CHECK-ENCODING: [0x20,0x38,0xbf,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 20 38 bf 44 <unknown>
|
||||
|
||||
sqdmlslb z0.d, z1.s, z15.s[3]
|
||||
// CHECK-INST: sqdmlslb z0.d, z1.s, z15.s[3]
|
||||
// CHECK-ENCODING: [0x20,0x38,0xff,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 20 38 ff 44 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z21, z28
|
||||
// CHECK-INST: movprfx z21, z28
|
||||
// CHECK-ENCODING: [0x95,0xbf,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 95 bf 20 04 <unknown>
|
||||
|
||||
sqdmlslb z21.d, z1.s, z31.s
|
||||
// CHECK-INST: sqdmlslb z21.d, z1.s, z31.s
|
||||
// CHECK-ENCODING: [0x35,0x68,0xdf,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 35 68 df 44 <unknown>
|
||||
|
||||
movprfx z21, z28
|
||||
// CHECK-INST: movprfx z21, z28
|
||||
// CHECK-ENCODING: [0x95,0xbf,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 95 bf 20 04 <unknown>
|
||||
|
||||
sqdmlslb z21.d, z10.s, z5.s[1]
|
||||
// CHECK-INST: sqdmlslb z21.d, z10.s, z5.s[1]
|
||||
// CHECK-ENCODING: [0x55,0x39,0xe5,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 55 39 e5 44 <unknown>
|
||||
|
|
@ -0,0 +1,116 @@
|
|||
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s
|
||||
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// z register out of range for index
|
||||
|
||||
sqdmlslt z0.s, z1.h, z8.h[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
|
||||
// CHECK-NEXT: sqdmlslt z0.s, z1.h, z8.h[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslt z0.d, z1.s, z16.s[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
|
||||
// CHECK-NEXT: sqdmlslt z0.d, z1.s, z16.s[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Index out of bounds
|
||||
|
||||
sqdmlslt z0.s, z1.h, z7.h[-1]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7].
|
||||
// CHECK-NEXT: sqdmlslt z0.s, z1.h, z7.h[-1]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslt z0.s, z1.h, z7.h[8]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7].
|
||||
// CHECK-NEXT: sqdmlslt z0.s, z1.h, z7.h[8]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslt z0.d, z1.s, z15.s[-1]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
|
||||
// CHECK-NEXT: sqdmlslt z0.d, z1.s, z15.s[-1]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslt z0.d, z1.s, z15.s[4]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
|
||||
// CHECK-NEXT: sqdmlslt z0.d, z1.s, z15.s[4]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Invalid element width
|
||||
|
||||
sqdmlslt z0.b, z1.b, z2.b
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslt z0.b, z1.b, z2.b
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslt z0.h, z1.h, z2.h
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslt z0.h, z1.h, z2.h
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslt z0.s, z1.s, z2.s
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslt z0.s, z1.s, z2.s
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslt z0.d, z1.d, z2.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslt z0.d, z1.d, z2.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslt z0.b, z1.b, z2.b[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslt z0.b, z1.b, z2.b[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslt z0.h, z1.h, z2.h[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslt z0.h, z1.h, z2.h[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslt z0.s, z1.b, z2.b[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslt z0.s, z1.b, z2.b[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslt z0.s, z1.s, z2.s[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslt z0.s, z1.s, z2.s[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslt z0.s, z1.d, z2.d[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslt z0.s, z1.d, z2.d[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslt z0.d, z1.b, z2.b[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslt z0.d, z1.b, z2.b[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslt z0.d, z1.h, z2.h[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslt z0.d, z1.h, z2.h[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
sqdmlslt z0.d, z1.d, z2.d[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: sqdmlslt z0.d, z1.d, z2.d[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
sqdmlslt z0.d, z1.s, z15.s
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
|
||||
// CHECK-NEXT: sqdmlslt z0.d, z1.s, z15.s
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
sqdmlslt z0.d, z1.s, z15.s[0]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
|
||||
// CHECK-NEXT: sqdmlslt z0.d, z1.s, z15.s[0]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
|
@ -0,0 +1,67 @@
|
|||
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
|
||||
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
|
||||
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
|
||||
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
|
||||
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
|
||||
// RUN: | llvm-objdump -d -mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
|
||||
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
|
||||
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
|
||||
|
||||
|
||||
sqdmlslt z0.h, z1.b, z31.b
|
||||
// CHECK-INST: sqdmlslt z0.h, z1.b, z31.b
|
||||
// CHECK-ENCODING: [0x20,0x6c,0x5f,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 20 6c 5f 44 <unknown>
|
||||
|
||||
sqdmlslt z0.s, z1.h, z31.h
|
||||
// CHECK-INST: sqdmlslt z0.s, z1.h, z31.h
|
||||
// CHECK-ENCODING: [0x20,0x6c,0x9f,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 20 6c 9f 44 <unknown>
|
||||
|
||||
sqdmlslt z0.d, z1.s, z31.s
|
||||
// CHECK-INST: sqdmlslt z0.d, z1.s, z31.s
|
||||
// CHECK-ENCODING: [0x20,0x6c,0xdf,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 20 6c df 44 <unknown>
|
||||
|
||||
sqdmlslt z0.s, z1.h, z7.h[7]
|
||||
// CHECK-INST: sqdmlslt z0.s, z1.h, z7.h[7]
|
||||
// CHECK-ENCODING: [0x20,0x3c,0xbf,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 20 3c bf 44 <unknown>
|
||||
|
||||
sqdmlslt z0.d, z1.s, z15.s[3]
|
||||
// CHECK-INST: sqdmlslt z0.d, z1.s, z15.s[3]
|
||||
// CHECK-ENCODING: [0x20,0x3c,0xff,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 20 3c ff 44 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z21, z28
|
||||
// CHECK-INST: movprfx z21, z28
|
||||
// CHECK-ENCODING: [0x95,0xbf,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 95 bf 20 04 <unknown>
|
||||
|
||||
sqdmlslt z21.d, z1.s, z31.s
|
||||
// CHECK-INST: sqdmlslt z21.d, z1.s, z31.s
|
||||
// CHECK-ENCODING: [0x35,0x6c,0xdf,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 35 6c df 44 <unknown>
|
||||
|
||||
movprfx z21, z28
|
||||
// CHECK-INST: movprfx z21, z28
|
||||
// CHECK-ENCODING: [0x95,0xbf,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 95 bf 20 04 <unknown>
|
||||
|
||||
sqdmlslt z21.d, z10.s, z5.s[1]
|
||||
// CHECK-INST: sqdmlslt z21.d, z10.s, z5.s[1]
|
||||
// CHECK-ENCODING: [0x55,0x3d,0xe5,0x44]
|
||||
// CHECK-ERROR: instruction requires: sve2
|
||||
// CHECK-UNKNOWN: 55 3d e5 44 <unknown>
|
||||
Loading…
Reference in New Issue