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tests/CodeGen: Use %python lit substitution when invoking python 

This will use the python that LLVM was configured to use rather than
python from PATH.

Reviewed By: serge-sans-paille

Differential Revision: https://reviews.llvm.org/D105224
This commit is contained in:
Tom Stellard 2021-07-06 18:46:21 -07:00
parent 3553698de7
commit 7f1c077c30
17 changed files with 23 additions and 23 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
llvm/test/CodeGen/NVPTX/ld-st-addrrspace.py
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@ -1,7 +1,7 @@
# This test generates all variants of load/store instructions and verifies that
# LLVM generates correct PTX for them.
# RUN: python %s > %t.ll
# RUN: %python %s > %t.ll
# RUN: llc < %t.ll -march=nvptx64 -mcpu=sm_30 | FileCheck -check-prefixes=CHECK,CHECK_P64 %t.ll
# RUN: llc < %t.ll -march=nvptx -mcpu=sm_30 | FileCheck -check-prefixes=CHECK,CHECK_P32 %t.ll

14
llvm/test/CodeGen/NVPTX/wmma.py
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@ -2,7 +2,7 @@
# generates correct instructions for them.
# Check all variants of instructions supported by PTX60 on SM70
# RUN: python %s --ptx=60 --gpu-arch=70 > %t-ptx60-sm_70.ll
# RUN: %python %s --ptx=60 --gpu-arch=70 > %t-ptx60-sm_70.ll
# RUN: FileCheck %t-ptx60-sm_70.ll < %t-ptx60-sm_70.ll \
# RUN: --check-prefixes=INTRINSICS,M16N16
# RUN: FileCheck %t-ptx60-sm_70.ll < %t-ptx60-sm_70.ll \
@ -11,7 +11,7 @@
# RUN: | FileCheck %t-ptx60-sm_70.ll
# Check all variants of instructions supported by PTX61 on SM70
# RUN: python %s --ptx=61 --gpu-arch=70 > %t-ptx61-sm_70.ll
# RUN: %python %s --ptx=61 --gpu-arch=70 > %t-ptx61-sm_70.ll
# RUN: FileCheck %t-ptx61-sm_70.ll < %t-ptx61-sm_70.ll \
# RUN: --check-prefixes=INTRINSICS,M16N16,EXTGEOM
# RUN: FileCheck %t-ptx61-sm_70.ll < %t-ptx61-sm_70.ll \
@ -20,7 +20,7 @@
# RUN: | FileCheck %t-ptx61-sm_70.ll
# Check all variants of instructions supported by PTX63 on SM72
# RUN: python %s --ptx=63 --gpu-arch=72 > %t-ptx63-sm_72.ll
# RUN: %python %s --ptx=63 --gpu-arch=72 > %t-ptx63-sm_72.ll
# RUN: FileCheck %t-ptx63-sm_72.ll < %t-ptx63-sm_72.ll \
# RUN: --check-prefixes=INTRINSICS,M16N16,EXTGEOM,INT
# RUN: FileCheck %t-ptx63-sm_72.ll < %t-ptx63-sm_72.ll \
@ -29,7 +29,7 @@
# RUN: | FileCheck %t-ptx63-sm_72.ll
# Check all variants of instructions supported by PTX63 on SM75
# RUN: python %s --ptx=63 --gpu-arch=75 > %t-ptx63-sm_75.ll
# RUN: %python %s --ptx=63 --gpu-arch=75 > %t-ptx63-sm_75.ll
# RUN: FileCheck %t-ptx63-sm_75.ll < %t-ptx63-sm_75.ll \
# RUN: --check-prefixes=INTRINSICS,M16N16,EXTGEOM,INT,SUBINT
# RUN: FileCheck %t-ptx63-sm_75.ll < %t-ptx63-sm_75.ll \
@ -38,7 +38,7 @@
# RUN: | FileCheck %t-ptx63-sm_75.ll
# Check all variants of instructions supported by PTX64 on SM70+
# RUN: python %s --ptx=64 --gpu-arch=70 > %t-ptx64-sm_70.ll
# RUN: %python %s --ptx=64 --gpu-arch=70 > %t-ptx64-sm_70.ll
# RUN: FileCheck %t-ptx64-sm_70.ll < %t-ptx64-sm_70.ll \
# RUN: --check-prefixes=INTRINSICS,M16N16,EXTGEOM,MMA
# RUN: FileCheck %t-ptx64-sm_70.ll < %t-ptx64-sm_70.ll \
@ -47,7 +47,7 @@
# RUN: | FileCheck %t-ptx64-sm_70.ll
# Check all variants of instructions supported by PTX65 on SM75+
# RUN: python %s --ptx=65 --gpu-arch=75 > %t-ptx65-sm_75.ll
# RUN: %python %s --ptx=65 --gpu-arch=75 > %t-ptx65-sm_75.ll
# RUN: FileCheck %t-ptx65-sm_75.ll < %t-ptx65-sm_75.ll \
# RUN: --check-prefixes=INTRINSICS,M16N16,EXTGEOM,INT,SUBINT,MMA,PTX65MMA
# RUN: FileCheck %t-ptx65-sm_75.ll < %t-ptx65-sm_75.ll \
@ -56,7 +56,7 @@
# RUN: | FileCheck %t-ptx65-sm_75.ll
# Check all variants of instructions supported by PTX70 on SM80+
# RUN: python %s --ptx=70 --gpu-arch=80 > %t-ptx70-sm_80.ll
# RUN: %python %s --ptx=70 --gpu-arch=80 > %t-ptx70-sm_80.ll
# RUN: FileCheck %t-ptx70-sm_80.ll < %t-ptx70-sm_80.ll \
# RUN: --check-prefixes=INTRINSICS,M16N16,EXTGEOM,INT,SUBINT,MMA,ALTFLOAT,DOUBLE,PTX65MMA,PTX70MMA
# RUN: FileCheck %t-ptx70-sm_80.ll < %t-ptx70-sm_80.ll \

2
llvm/test/CodeGen/SystemZ/Large/branch-range-01.py
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@ -1,6 +1,6 @@
# Test normal conditional branches in cases where the sheer number of
# instructions causes some branches to be out of range.
# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# RUN: %python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# Construct:
#

2
llvm/test/CodeGen/SystemZ/Large/branch-range-02.py
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@ -1,6 +1,6 @@
# Test normal conditional branches in cases where block alignments cause
# some branches to be out of range.
# RUN: python %s | llc -mtriple=s390x-linux-gnu -align-all-blocks=8 | FileCheck %s
# RUN: %python %s | llc -mtriple=s390x-linux-gnu -align-all-blocks=8 | FileCheck %s
# Construct:
#

2
llvm/test/CodeGen/SystemZ/Large/branch-range-03.py
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@ -1,6 +1,6 @@
# Test 32-bit COMPARE AND BRANCH in cases where the sheer number of
# instructions causes some branches to be out of range.
# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# RUN: %python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# Construct:
#

2
llvm/test/CodeGen/SystemZ/Large/branch-range-04.py
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@ -1,6 +1,6 @@
# Test 64-bit COMPARE AND BRANCH in cases where the sheer number of
# instructions causes some branches to be out of range.
# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# RUN: %python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# Construct:
#

2
llvm/test/CodeGen/SystemZ/Large/branch-range-05.py
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@ -1,6 +1,6 @@
# Test 32-bit COMPARE IMMEDIATE AND BRANCH in cases where the sheer number of
# instructions causes some branches to be out of range.
# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# RUN: %python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# Construct:
#

2
llvm/test/CodeGen/SystemZ/Large/branch-range-06.py
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@ -1,6 +1,6 @@
# Test 64-bit COMPARE IMMEDIATE AND BRANCH in cases where the sheer number of
# instructions causes some branches to be out of range.
# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# RUN: %python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# Construct:
#

2
llvm/test/CodeGen/SystemZ/Large/branch-range-07.py
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@ -1,6 +1,6 @@
# Test 32-bit BRANCH RELATIVE ON COUNT in cases where some branches are out
# of range.
# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# RUN: %python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# Construct:
#

2
llvm/test/CodeGen/SystemZ/Large/branch-range-08.py
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@ -1,6 +1,6 @@
# Test 64-bit BRANCH RELATIVE ON COUNT in cases where some branches are out
# of range.
# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# RUN: %python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# Construct:
#

2
llvm/test/CodeGen/SystemZ/Large/branch-range-09.py
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@ -1,6 +1,6 @@
# Test 32-bit COMPARE LOGICAL AND BRANCH in cases where the sheer number of
# instructions causes some branches to be out of range.
# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# RUN: %python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# Construct:
#

2
llvm/test/CodeGen/SystemZ/Large/branch-range-10.py
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@ -1,6 +1,6 @@
# Test 64-bit COMPARE LOGICAL AND BRANCH in cases where the sheer number of
# instructions causes some branches to be out of range.
# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# RUN: %python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# Construct:
#

2
llvm/test/CodeGen/SystemZ/Large/branch-range-11.py
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@ -1,6 +1,6 @@
# Test 32-bit COMPARE LOGICAL IMMEDIATE AND BRANCH in cases where the sheer
# number of instructions causes some branches to be out of range.
# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# RUN: %python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# Construct:
#

2
llvm/test/CodeGen/SystemZ/Large/branch-range-12.py
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@ -1,6 +1,6 @@
# Test 64-bit COMPARE LOGICAL IMMEDIATE AND BRANCH in cases where the sheer
# number of instructions causes some branches to be out of range.
# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# RUN: %python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# Construct:
#

2
llvm/test/CodeGen/SystemZ/Large/branch-range-13.py
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@ -1,7 +1,7 @@
# Test that inline assembly get the right size value so that a branch across
# a block containing them gets relaxed.
# RUN: python %s | llc -mtriple=s390x-linux-gnu -mcpu=z196 -enable-post-misched=false \
# RUN: %python %s | llc -mtriple=s390x-linux-gnu -mcpu=z196 -enable-post-misched=false \
# RUN: | FileCheck %s
# Construct:

2
llvm/test/CodeGen/SystemZ/Large/spill-01.py
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@ -1,5 +1,5 @@
# Test cases where MVC is used for spill slots that end up being out of range.
# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# RUN: %python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# There are 8 usable call-saved GPRs, two of which are needed for the base
# registers. The first 160 bytes of the frame are needed for the ABI

2
llvm/test/CodeGen/SystemZ/Large/spill-02.py
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@ -1,6 +1,6 @@
# Test cases where we spill from one frame index to another, both of which
# are out of range of MVC, and both of which need emergency spill slots.
# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# RUN: %python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
# CHECK: f1:
# CHECK: %fallthru