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[X86] Merge VMOVMSKBrr and MOVMSKBrr in the SNB sheduler model. 

The VMOVMSKBrr was in a separate InstRW with a lower latency, but I assume they should be the same and the higher latency matches Agners table so I'm going with that.

llvm-svn: 328291
This commit is contained in:
Craig Topper 2018-03-23 06:41:38 +00:00
parent fae4173b47
commit 7f142b8bf1
2 changed files with 3 additions and 4 deletions
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5
llvm/lib/Target/X86/X86SchedSandyBridge.td
View File

@ -258,8 +258,7 @@ def SBWriteResGroup0 : SchedWriteRes<[SBPort0]> {
let NumMicroOps = 1;
let ResourceCycles = [1];
}
def: InstRW<[SBWriteResGroup0], (instregex "VPMOVMSKBrr",
"(V?)CVTSS2SDrr",
def: InstRW<[SBWriteResGroup0], (instregex "(V?)CVTSS2SDrr",
"(V?)PSLLDri",
"(V?)PSLLQri",
"(V?)PSLLWri",
@ -551,7 +550,7 @@ def SBWriteResGroup7 : SchedWriteRes<[SBPort0]> {
let NumMicroOps = 1;
let ResourceCycles = [1];
}
def: InstRW<[SBWriteResGroup7], (instregex "PMOVMSKBrr",
def: InstRW<[SBWriteResGroup7], (instregex "(V?)PMOVMSKBrr",
"VMOVMSKPDYrr",
"(V?)MOVMSKPDrr",
"VMOVMSKPSYrr",

2
llvm/test/CodeGen/X86/sse2-schedule.ll
View File

@ -5987,7 +5987,7 @@ define i32 @test_pmovmskb(<16 x i8> %a0) {
;
; SANDY-LABEL: test_pmovmskb:
; SANDY: # %bb.0:
; SANDY-NEXT: vpmovmskb %xmm0, %eax # sched: [1:1.00]
; SANDY-NEXT: vpmovmskb %xmm0, %eax # sched: [2:1.00]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pmovmskb: