[Hexagon] Some formatting changes, NFC

llvm-svn: 348162
This commit is contained in:
Krzysztof Parzyszek 2018-12-03 18:40:15 +00:00
parent 5da1825ebc
commit 7ecc277ef9
2 changed files with 3 additions and 5 deletions

View File

@ -1,4 +1,4 @@
//===- HexagonDepArch.h ---------------------------------------------------===// //===----------------------------------------------------------------------===//
// //
// The LLVM Compiler Infrastructure // The LLVM Compiler Infrastructure
// //
@ -10,12 +10,11 @@
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
#ifndef HEXAGON_DEP_ARCH_H #ifndef HEXAGON_DEP_ARCH_H
#define HEXAGON_DEP_ARCH_H #define HEXAGON_DEP_ARCH_H
namespace llvm { namespace llvm {
namespace Hexagon { namespace Hexagon {
enum class ArchEnum { NoArch,Generic,V5,V55,V60,V62,V65 }; enum class ArchEnum { NoArch, Generic, V5, V55, V60, V62, V65 };
} // namespace Hexagon } // namespace Hexagon
} // namespace llvm; } // namespace llvm;
#endif // HEXAGON_DEP_ARCH_H #endif // HEXAGON_DEP_ARCH_H

View File

@ -1,4 +1,4 @@
//===- HexagonDepMappings.td ----------------------------------------------===// //===----------------------------------------------------------------------===//
// //
// The LLVM Compiler Infrastructure // The LLVM Compiler Infrastructure
// //
@ -9,7 +9,6 @@
// Automatically generated file, please consult code owner before editing. // Automatically generated file, please consult code owner before editing.
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
def A2_negAlias : InstAlias<"$Rd32 = neg($Rs32)", (A2_subri IntRegs:$Rd32, 0, IntRegs:$Rs32)>; def A2_negAlias : InstAlias<"$Rd32 = neg($Rs32)", (A2_subri IntRegs:$Rd32, 0, IntRegs:$Rs32)>;
def A2_notAlias : InstAlias<"$Rd32 = not($Rs32)", (A2_subri IntRegs:$Rd32, -1, IntRegs:$Rs32)>; def A2_notAlias : InstAlias<"$Rd32 = not($Rs32)", (A2_subri IntRegs:$Rd32, -1, IntRegs:$Rs32)>;
def A2_tfrfAlias : InstAlias<"if (!$Pu4) $Rd32 = $Rs32", (A2_paddif IntRegs:$Rd32, PredRegs:$Pu4, IntRegs:$Rs32, 0)>; def A2_tfrfAlias : InstAlias<"if (!$Pu4) $Rd32 = $Rs32", (A2_paddif IntRegs:$Rd32, PredRegs:$Pu4, IntRegs:$Rs32, 0)>;