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[NVPTX] Renamed NVPTXLowerKernelArgs -> NVPTXLowerArgs. NFC. 

After r276153 the pass applies to both kernels and regular functions.

Differential Revision: https://reviews.llvm.org/D22583

llvm-svn: 276189
This commit is contained in:
Artem Belevich 2016-07-20 21:44:07 +00:00
parent 423f46f2d8
commit 7e9c9a6582
5 changed files with 22 additions and 22 deletions
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2
llvm/lib/Target/NVPTX/CMakeLists.txt
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@ -21,7 +21,7 @@ set(NVPTXCodeGen_sources
NVPTXInferAddressSpaces.cpp NVPTXInferAddressSpaces.cpp
NVPTXInstrInfo.cpp NVPTXInstrInfo.cpp
NVPTXLowerAggrCopies.cpp NVPTXLowerAggrCopies.cpp
NVPTXLowerKernelArgs.cpp NVPTXLowerArgs.cpp
NVPTXLowerAlloca.cpp NVPTXLowerAlloca.cpp
NVPTXPeephole.cpp NVPTXPeephole.cpp
NVPTXMCExpr.cpp NVPTXMCExpr.cpp

2
llvm/lib/Target/NVPTX/NVPTX.h
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@ -53,7 +53,7 @@ FunctionPass *createNVVMReflectPass(const StringMap<int> &Mapping);
MachineFunctionPass *createNVPTXPrologEpilogPass(); MachineFunctionPass *createNVPTXPrologEpilogPass();
MachineFunctionPass *createNVPTXReplaceImageHandlesPass(); MachineFunctionPass *createNVPTXReplaceImageHandlesPass();
FunctionPass *createNVPTXImageOptimizerPass(); FunctionPass *createNVPTXImageOptimizerPass();
FunctionPass *createNVPTXLowerKernelArgsPass(const NVPTXTargetMachine *TM); FunctionPass *createNVPTXLowerArgsPass(const NVPTXTargetMachine *TM);
BasicBlockPass *createNVPTXLowerAllocaPass(); BasicBlockPass *createNVPTXLowerAllocaPass();
MachineFunctionPass *createNVPTXPeephole(); MachineFunctionPass *createNVPTXPeephole();

28
llvm/lib/Target/NVPTX/NVPTXLowerKernelArgs.cpp → llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
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@ -1,4 +1,4 @@
//===-- NVPTXLowerKernelArgs.cpp - Lower kernel arguments -----------------===// //===-- NVPTXLowerArgs.cpp - Lower arguments ------------------------------===//
// //
// The LLVM Compiler Infrastructure // The LLVM Compiler Infrastructure
// //
@ -102,11 +102,11 @@
using namespace llvm; using namespace llvm;
namespace llvm { namespace llvm {
void initializeNVPTXLowerKernelArgsPass(PassRegistry &); void initializeNVPTXLowerArgsPass(PassRegistry &);
} }
namespace { namespace {
class NVPTXLowerKernelArgs : public FunctionPass { class NVPTXLowerArgs : public FunctionPass {
bool runOnFunction(Function &F) override; bool runOnFunction(Function &F) override;
bool runOnKernelFunction(Function &F); bool runOnKernelFunction(Function &F);
@ -122,7 +122,7 @@ class NVPTXLowerKernelArgs : public FunctionPass {
public: public:
static char ID; // Pass identification, replacement for typeid static char ID; // Pass identification, replacement for typeid
NVPTXLowerKernelArgs(const NVPTXTargetMachine *TM = nullptr) NVPTXLowerArgs(const NVPTXTargetMachine *TM = nullptr)
: FunctionPass(ID), TM(TM) {} : FunctionPass(ID), TM(TM) {}
const char *getPassName() const override { const char *getPassName() const override {
return "Lower pointer arguments of CUDA kernels"; return "Lower pointer arguments of CUDA kernels";
@ -133,10 +133,10 @@ private:
}; };
} // namespace } // namespace
char NVPTXLowerKernelArgs::ID = 1; char NVPTXLowerArgs::ID = 1;
INITIALIZE_PASS(NVPTXLowerKernelArgs, "nvptx-lower-kernel-args", INITIALIZE_PASS(NVPTXLowerArgs, "nvptx-lower-args",
"Lower kernel arguments (NVPTX)", false, false) "Lower arguments (NVPTX)", false, false)
// ============================================================================= // =============================================================================
// If the function had a byval struct ptr arg, say foo(%struct.x* byval %d), // If the function had a byval struct ptr arg, say foo(%struct.x* byval %d),
@ -151,7 +151,7 @@ INITIALIZE_PASS(NVPTXLowerKernelArgs, "nvptx-lower-kernel-args",
// struct from param space to local space. // struct from param space to local space.
// Then replace all occurrences of %d by %temp. // Then replace all occurrences of %d by %temp.
// ============================================================================= // =============================================================================
void NVPTXLowerKernelArgs::handleByValParam(Argument *Arg) { void NVPTXLowerArgs::handleByValParam(Argument *Arg) {
Function *Func = Arg->getParent(); Function *Func = Arg->getParent();
Instruction *FirstInst = &(Func->getEntryBlock().front()); Instruction *FirstInst = &(Func->getEntryBlock().front());
PointerType *PType = dyn_cast<PointerType>(Arg->getType()); PointerType *PType = dyn_cast<PointerType>(Arg->getType());
@ -173,7 +173,7 @@ void NVPTXLowerKernelArgs::handleByValParam(Argument *Arg) {
new StoreInst(LI, AllocA, FirstInst); new StoreInst(LI, AllocA, FirstInst);
} }
void NVPTXLowerKernelArgs::markPointerAsGlobal(Value *Ptr) { void NVPTXLowerArgs::markPointerAsGlobal(Value *Ptr) {
if (Ptr->getType()->getPointerAddressSpace() == ADDRESS_SPACE_GLOBAL) if (Ptr->getType()->getPointerAddressSpace() == ADDRESS_SPACE_GLOBAL)
return; return;
@ -203,7 +203,7 @@ void NVPTXLowerKernelArgs::markPointerAsGlobal(Value *Ptr) {
// ============================================================================= // =============================================================================
// Main function for this pass. // Main function for this pass.
// ============================================================================= // =============================================================================
bool NVPTXLowerKernelArgs::runOnKernelFunction(Function &F) { bool NVPTXLowerArgs::runOnKernelFunction(Function &F) {
if (TM && TM->getDrvInterface() == NVPTX::CUDA) { if (TM && TM->getDrvInterface() == NVPTX::CUDA) {
// Mark pointers in byval structs as global. // Mark pointers in byval structs as global.
for (auto &B : F) { for (auto &B : F) {
@ -236,18 +236,18 @@ bool NVPTXLowerKernelArgs::runOnKernelFunction(Function &F) {
} }
// Device functions only need to copy byval args into local memory. // Device functions only need to copy byval args into local memory.
bool NVPTXLowerKernelArgs::runOnDeviceFunction(Function &F) { bool NVPTXLowerArgs::runOnDeviceFunction(Function &F) {
for (Argument &Arg : F.args()) for (Argument &Arg : F.args())
if (Arg.getType()->isPointerTy() && Arg.hasByValAttr()) if (Arg.getType()->isPointerTy() && Arg.hasByValAttr())
handleByValParam(&Arg); handleByValParam(&Arg);
return true; return true;
} }
bool NVPTXLowerKernelArgs::runOnFunction(Function &F) { bool NVPTXLowerArgs::runOnFunction(Function &F) {
return isKernelFunction(F) ? runOnKernelFunction(F) : runOnDeviceFunction(F); return isKernelFunction(F) ? runOnKernelFunction(F) : runOnDeviceFunction(F);
} }
FunctionPass * FunctionPass *
llvm::createNVPTXLowerKernelArgsPass(const NVPTXTargetMachine *TM) { llvm::createNVPTXLowerArgsPass(const NVPTXTargetMachine *TM) {
return new NVPTXLowerKernelArgs(TM); return new NVPTXLowerArgs(TM);
} }

10
llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
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@ -63,7 +63,7 @@ void initializeNVPTXAssignValidGlobalNamesPass(PassRegistry&);
void initializeNVPTXFavorNonGenericAddrSpacesPass(PassRegistry &); void initializeNVPTXFavorNonGenericAddrSpacesPass(PassRegistry &);
void initializeNVPTXInferAddressSpacesPass(PassRegistry &); void initializeNVPTXInferAddressSpacesPass(PassRegistry &);
void initializeNVPTXLowerAggrCopiesPass(PassRegistry &); void initializeNVPTXLowerAggrCopiesPass(PassRegistry &);
void initializeNVPTXLowerKernelArgsPass(PassRegistry &); void initializeNVPTXLowerArgsPass(PassRegistry &);
void initializeNVPTXLowerAllocaPass(PassRegistry &); void initializeNVPTXLowerAllocaPass(PassRegistry &);
} }
@ -82,7 +82,7 @@ extern "C" void LLVMInitializeNVPTXTarget() {
initializeNVPTXAssignValidGlobalNamesPass(PR); initializeNVPTXAssignValidGlobalNamesPass(PR);
initializeNVPTXFavorNonGenericAddrSpacesPass(PR); initializeNVPTXFavorNonGenericAddrSpacesPass(PR);
initializeNVPTXInferAddressSpacesPass(PR); initializeNVPTXInferAddressSpacesPass(PR);
initializeNVPTXLowerKernelArgsPass(PR); initializeNVPTXLowerArgsPass(PR);
initializeNVPTXLowerAllocaPass(PR); initializeNVPTXLowerAllocaPass(PR);
initializeNVPTXLowerAggrCopiesPass(PR); initializeNVPTXLowerAggrCopiesPass(PR);
} }
@ -195,7 +195,7 @@ void NVPTXPassConfig::addEarlyCSEOrGVNPass() {
} }
void NVPTXPassConfig::addAddressSpaceInferencePasses() { void NVPTXPassConfig::addAddressSpaceInferencePasses() {
// NVPTXLowerKernelArgs emits alloca for byval parameters which can often // NVPTXLowerArgs emits alloca for byval parameters which can often
// be eliminated by SROA. // be eliminated by SROA.
addPass(createSROAPass()); addPass(createSROAPass());
addPass(createNVPTXLowerAllocaPass()); addPass(createNVPTXLowerAllocaPass());
@ -253,9 +253,9 @@ void NVPTXPassConfig::addIRPasses() {
addPass(createNVPTXAssignValidGlobalNamesPass()); addPass(createNVPTXAssignValidGlobalNamesPass());
addPass(createGenericToNVVMPass()); addPass(createGenericToNVVMPass());
// NVPTXLowerKernelArgs is required for correctness and should be run right // NVPTXLowerArgs is required for correctness and should be run right
// before the address space inference passes. // before the address space inference passes.
addPass(createNVPTXLowerKernelArgsPass(&getNVPTXTargetMachine())); addPass(createNVPTXLowerArgsPass(&getNVPTXTargetMachine()));
if (getOptLevel() != CodeGenOpt::None) { if (getOptLevel() != CodeGenOpt::None) {
addAddressSpaceInferencePasses(); addAddressSpaceInferencePasses();
addStraightLineScalarOptimizationPasses(); addStraightLineScalarOptimizationPasses();

2
llvm/test/CodeGen/NVPTX/bug21465.ll
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@ -1,4 +1,4 @@
; RUN: opt < %s -nvptx-lower-kernel-args -S | FileCheck %s ; RUN: opt < %s -nvptx-lower-args -S | FileCheck %s
; RUN: llc < %s -march=nvptx64 -mcpu=sm_35 | FileCheck %s --check-prefix PTX ; RUN: llc < %s -march=nvptx64 -mcpu=sm_35 | FileCheck %s --check-prefix PTX
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64" target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"