forked from OSchip/llvm-project
[NVPTX] Renamed NVPTXLowerKernelArgs -> NVPTXLowerArgs. NFC.
After r276153 the pass applies to both kernels and regular functions. Differential Revision: https://reviews.llvm.org/D22583 llvm-svn: 276189
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@ -21,7 +21,7 @@ set(NVPTXCodeGen_sources
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NVPTXInferAddressSpaces.cpp
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NVPTXInstrInfo.cpp
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NVPTXLowerAggrCopies.cpp
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NVPTXLowerKernelArgs.cpp
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NVPTXLowerArgs.cpp
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NVPTXLowerAlloca.cpp
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NVPTXPeephole.cpp
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NVPTXMCExpr.cpp
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@ -53,7 +53,7 @@ FunctionPass *createNVVMReflectPass(const StringMap<int> &Mapping);
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MachineFunctionPass *createNVPTXPrologEpilogPass();
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MachineFunctionPass *createNVPTXReplaceImageHandlesPass();
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FunctionPass *createNVPTXImageOptimizerPass();
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FunctionPass *createNVPTXLowerKernelArgsPass(const NVPTXTargetMachine *TM);
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FunctionPass *createNVPTXLowerArgsPass(const NVPTXTargetMachine *TM);
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BasicBlockPass *createNVPTXLowerAllocaPass();
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MachineFunctionPass *createNVPTXPeephole();
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@ -1,4 +1,4 @@
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//===-- NVPTXLowerKernelArgs.cpp - Lower kernel arguments -----------------===//
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//===-- NVPTXLowerArgs.cpp - Lower arguments ------------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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@ -102,11 +102,11 @@
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using namespace llvm;
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namespace llvm {
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void initializeNVPTXLowerKernelArgsPass(PassRegistry &);
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void initializeNVPTXLowerArgsPass(PassRegistry &);
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}
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namespace {
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class NVPTXLowerKernelArgs : public FunctionPass {
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class NVPTXLowerArgs : public FunctionPass {
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bool runOnFunction(Function &F) override;
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bool runOnKernelFunction(Function &F);
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@ -122,7 +122,7 @@ class NVPTXLowerKernelArgs : public FunctionPass {
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public:
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static char ID; // Pass identification, replacement for typeid
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NVPTXLowerKernelArgs(const NVPTXTargetMachine *TM = nullptr)
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NVPTXLowerArgs(const NVPTXTargetMachine *TM = nullptr)
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: FunctionPass(ID), TM(TM) {}
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const char *getPassName() const override {
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return "Lower pointer arguments of CUDA kernels";
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@ -133,10 +133,10 @@ private:
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};
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} // namespace
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char NVPTXLowerKernelArgs::ID = 1;
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char NVPTXLowerArgs::ID = 1;
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INITIALIZE_PASS(NVPTXLowerKernelArgs, "nvptx-lower-kernel-args",
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"Lower kernel arguments (NVPTX)", false, false)
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INITIALIZE_PASS(NVPTXLowerArgs, "nvptx-lower-args",
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"Lower arguments (NVPTX)", false, false)
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// =============================================================================
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// If the function had a byval struct ptr arg, say foo(%struct.x* byval %d),
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@ -151,7 +151,7 @@ INITIALIZE_PASS(NVPTXLowerKernelArgs, "nvptx-lower-kernel-args",
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// struct from param space to local space.
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// Then replace all occurrences of %d by %temp.
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// =============================================================================
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void NVPTXLowerKernelArgs::handleByValParam(Argument *Arg) {
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void NVPTXLowerArgs::handleByValParam(Argument *Arg) {
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Function *Func = Arg->getParent();
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Instruction *FirstInst = &(Func->getEntryBlock().front());
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PointerType *PType = dyn_cast<PointerType>(Arg->getType());
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@ -173,7 +173,7 @@ void NVPTXLowerKernelArgs::handleByValParam(Argument *Arg) {
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new StoreInst(LI, AllocA, FirstInst);
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}
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void NVPTXLowerKernelArgs::markPointerAsGlobal(Value *Ptr) {
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void NVPTXLowerArgs::markPointerAsGlobal(Value *Ptr) {
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if (Ptr->getType()->getPointerAddressSpace() == ADDRESS_SPACE_GLOBAL)
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return;
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@ -203,7 +203,7 @@ void NVPTXLowerKernelArgs::markPointerAsGlobal(Value *Ptr) {
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// =============================================================================
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// Main function for this pass.
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// =============================================================================
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bool NVPTXLowerKernelArgs::runOnKernelFunction(Function &F) {
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bool NVPTXLowerArgs::runOnKernelFunction(Function &F) {
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if (TM && TM->getDrvInterface() == NVPTX::CUDA) {
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// Mark pointers in byval structs as global.
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for (auto &B : F) {
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@ -236,18 +236,18 @@ bool NVPTXLowerKernelArgs::runOnKernelFunction(Function &F) {
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}
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// Device functions only need to copy byval args into local memory.
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bool NVPTXLowerKernelArgs::runOnDeviceFunction(Function &F) {
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bool NVPTXLowerArgs::runOnDeviceFunction(Function &F) {
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for (Argument &Arg : F.args())
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if (Arg.getType()->isPointerTy() && Arg.hasByValAttr())
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handleByValParam(&Arg);
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return true;
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}
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bool NVPTXLowerKernelArgs::runOnFunction(Function &F) {
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bool NVPTXLowerArgs::runOnFunction(Function &F) {
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return isKernelFunction(F) ? runOnKernelFunction(F) : runOnDeviceFunction(F);
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}
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FunctionPass *
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llvm::createNVPTXLowerKernelArgsPass(const NVPTXTargetMachine *TM) {
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return new NVPTXLowerKernelArgs(TM);
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llvm::createNVPTXLowerArgsPass(const NVPTXTargetMachine *TM) {
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return new NVPTXLowerArgs(TM);
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}
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@ -63,7 +63,7 @@ void initializeNVPTXAssignValidGlobalNamesPass(PassRegistry&);
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void initializeNVPTXFavorNonGenericAddrSpacesPass(PassRegistry &);
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void initializeNVPTXInferAddressSpacesPass(PassRegistry &);
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void initializeNVPTXLowerAggrCopiesPass(PassRegistry &);
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void initializeNVPTXLowerKernelArgsPass(PassRegistry &);
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void initializeNVPTXLowerArgsPass(PassRegistry &);
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void initializeNVPTXLowerAllocaPass(PassRegistry &);
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}
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@ -82,7 +82,7 @@ extern "C" void LLVMInitializeNVPTXTarget() {
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initializeNVPTXAssignValidGlobalNamesPass(PR);
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initializeNVPTXFavorNonGenericAddrSpacesPass(PR);
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initializeNVPTXInferAddressSpacesPass(PR);
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initializeNVPTXLowerKernelArgsPass(PR);
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initializeNVPTXLowerArgsPass(PR);
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initializeNVPTXLowerAllocaPass(PR);
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initializeNVPTXLowerAggrCopiesPass(PR);
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}
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@ -195,7 +195,7 @@ void NVPTXPassConfig::addEarlyCSEOrGVNPass() {
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}
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void NVPTXPassConfig::addAddressSpaceInferencePasses() {
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// NVPTXLowerKernelArgs emits alloca for byval parameters which can often
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// NVPTXLowerArgs emits alloca for byval parameters which can often
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// be eliminated by SROA.
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addPass(createSROAPass());
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addPass(createNVPTXLowerAllocaPass());
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@ -253,9 +253,9 @@ void NVPTXPassConfig::addIRPasses() {
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addPass(createNVPTXAssignValidGlobalNamesPass());
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addPass(createGenericToNVVMPass());
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// NVPTXLowerKernelArgs is required for correctness and should be run right
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// NVPTXLowerArgs is required for correctness and should be run right
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// before the address space inference passes.
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addPass(createNVPTXLowerKernelArgsPass(&getNVPTXTargetMachine()));
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addPass(createNVPTXLowerArgsPass(&getNVPTXTargetMachine()));
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if (getOptLevel() != CodeGenOpt::None) {
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addAddressSpaceInferencePasses();
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addStraightLineScalarOptimizationPasses();
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@ -1,4 +1,4 @@
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; RUN: opt < %s -nvptx-lower-kernel-args -S | FileCheck %s
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; RUN: opt < %s -nvptx-lower-args -S | FileCheck %s
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_35 | FileCheck %s --check-prefix PTX
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
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