maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[FastISel] Provide the option to skip target-independent instruction selection. NFC. 

This allows the target to disable target-independent instruction selection and
jump directly into the target-dependent instruction selection code.

This can be beneficial for targets, such as AArch64, which could emit much
better code, but never got a chance to do so, because the target-independent
instruction selector was able to find an instruction sequence.

llvm-svn: 216947
This commit is contained in:
Juergen Ributzka 2014-09-02 21:07:44 +00:00
parent 77a609b556
commit 7e998fb5e6
2 changed files with 29 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
llvm/include/llvm/CodeGen/FastISel.h
View File

@ -202,6 +202,7 @@ protected:
const TargetLowering &TLI;
const TargetRegisterInfo &TRI;
const TargetLibraryInfo *LibInfo;
bool SkipTargetIndependentISel;
/// The position of the last instruction for materializing constants for use
/// in the current block. It resets to EmitStartPt when it makes sense (for
@ -307,8 +308,9 @@ public:
virtual ~FastISel();
protected:
explicit FastISel(FunctionLoweringInfo &funcInfo,
const TargetLibraryInfo *libInfo);
explicit FastISel(FunctionLoweringInfo &FuncInfo,
const TargetLibraryInfo *LibInfo,
bool SkipTargetIndependentISel = false);
/// This method is called by target-independent code when the normal FastISel
/// process fails to select an instruction. This gives targets a chance to
@ -545,7 +547,6 @@ protected:
}
}
private:
bool SelectBinaryOp(const User *I, unsigned ISDOpcode);
bool SelectFNeg(const User *I);
@ -566,6 +567,7 @@ private:
bool SelectInsertValue(const User *I);
private:
/// \brief Handle PHI nodes in successor blocks.
///
/// Emit code to ensure constants are copied into registers when needed.

42
llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
View File

@ -1344,8 +1344,24 @@ FastISel::SelectInstruction(const Instruction *I) {
}
// First, try doing target-independent selection.
if (SelectOperator(I, I->getOpcode())) {
++NumFastIselSuccessIndependent;
if (!SkipTargetIndependentISel) {
if (SelectOperator(I, I->getOpcode())) {
++NumFastIselSuccessIndependent;
DbgLoc = DebugLoc();
return true;
}
// Remove dead code. However, ignore call instructions since we've flushed
// the local value map and recomputed the insert point.
if (!isa<CallInst>(I)) {
recomputeInsertPt();
if (SavedInsertPt != FuncInfo.InsertPt)
removeDeadCode(FuncInfo.InsertPt, SavedInsertPt);
}
SavedInsertPt = FuncInfo.InsertPt;
}
// Next, try calling the target to attempt to handle the instruction.
if (TargetSelectInstruction(I)) {
++NumFastIselSuccessTarget;
DbgLoc = DebugLoc();
return true;
}
@ -1357,18 +1373,6 @@ FastISel::SelectInstruction(const Instruction *I) {
removeDeadCode(FuncInfo.InsertPt, SavedInsertPt);
}
// Next, try calling the target to attempt to handle the instruction.
SavedInsertPt = FuncInfo.InsertPt;
if (TargetSelectInstruction(I)) {
++NumFastIselSuccessTarget;
DbgLoc = DebugLoc();
return true;
}
// Check for dead code and remove as necessary.
recomputeInsertPt();
if (SavedInsertPt != FuncInfo.InsertPt)
removeDeadCode(FuncInfo.InsertPt, SavedInsertPt);
DbgLoc = DebugLoc();
// Undo phi node updates, because they will be added again by SelectionDAG.
if (isa<TerminatorInst>(I))
@ -1603,14 +1607,16 @@ FastISel::SelectOperator(const User *I, unsigned Opcode) {
}
}
FastISel::FastISel(FunctionLoweringInfo &funcInfo,
const TargetLibraryInfo *libInfo)
: FuncInfo(funcInfo), MF(funcInfo.MF), MRI(FuncInfo.MF->getRegInfo()),
FastISel::FastISel(FunctionLoweringInfo &FuncInfo,
const TargetLibraryInfo *LibInfo,
bool SkipTargetIndependentISel)
: FuncInfo(FuncInfo), MF(FuncInfo.MF), MRI(FuncInfo.MF->getRegInfo()),
MFI(*FuncInfo.MF->getFrameInfo()), MCP(*FuncInfo.MF->getConstantPool()),
TM(FuncInfo.MF->getTarget()), DL(*TM.getSubtargetImpl()->getDataLayout()),
TII(*TM.getSubtargetImpl()->getInstrInfo()),
TLI(*TM.getSubtargetImpl()->getTargetLowering()),
TRI(*TM.getSubtargetImpl()->getRegisterInfo()), LibInfo(libInfo) {}
TRI(*TM.getSubtargetImpl()->getRegisterInfo()), LibInfo(LibInfo),
SkipTargetIndependentISel(SkipTargetIndependentISel) {}
FastISel::~FastISel() {}