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Don't crash SPU BE with memory accesses with big alignmnet. 

llvm-svn: 123620
This commit is contained in:
Kalle Raiskila 2011-01-17 11:59:20 +00:00
parent dfce83c8f5
commit 7e7b4ac751
2 changed files with 13 additions and 4 deletions
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8
llvm/lib/Target/CellSPU/SPUISelLowering.cpp
View File

@ -560,7 +560,7 @@ LowerLOAD(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
assert( LN->getAddressingMode() == ISD::UNINDEXED
&& "we should get only UNINDEXED adresses");
// clean aligned loads can be selected as-is
if (InVT.getSizeInBits() == 128 && alignment == 16)
if (InVT.getSizeInBits() == 128 && (alignment%16) == 0)
return SDValue();
// Get pointerinfos to the memory chunk(s) that contain the data to load
@ -573,7 +573,7 @@ LowerLOAD(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
SDValue basePtr = LN->getBasePtr();
SDValue rotate;
if (alignment == 16) {
if ((alignment%16) == 0) {
ConstantSDNode *CN;
// Special cases for a known aligned load to simplify the base pointer
@ -777,7 +777,7 @@ LowerSTORE(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
assert( SN->getAddressingMode() == ISD::UNINDEXED
&& "we should get only UNINDEXED adresses");
// clean aligned loads can be selected as-is
if (StVT.getSizeInBits() == 128 && alignment == 16)
if (StVT.getSizeInBits() == 128 && (alignment%16) == 0)
return SDValue();
SDValue alignLoadVec;
@ -785,7 +785,7 @@ LowerSTORE(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
SDValue the_chain = SN->getChain();
SDValue insertEltOffs;
if (alignment == 16) {
if ((alignment%16) == 0) {
ConstantSDNode *CN;
// Special cases for a known aligned load to simplify the base pointer
// and insertion byte:

9
llvm/test/CodeGen/CellSPU/stores.ll
View File

@ -162,3 +162,12 @@ define void @store_misaligned( i32 %val, i32* %ptr) {
store i32 %val, i32*%ptr, align 2
ret void
}
define void @store_v8( <8 x float> %val, <8 x float>* %ptr )
{
;CHECK: stq
;CHECK: stq
;CHECK: bi $lr
store <8 x float> %val, <8 x float>* %ptr
ret void
}