forked from OSchip/llvm-project
parent
da349bab8a
commit
7dd8c0b991
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@ -239,13 +239,15 @@ def VMULS : ASbIn_Encode<0b11100, 0b10, 0, 0,
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IIC_fpMUL32, "vmul", ".f32\t$Sd, $Sn, $Sm",
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IIC_fpMUL32, "vmul", ".f32\t$Sd, $Sn, $Sm",
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[(set SPR:$Sd, (fmul SPR:$Sn, SPR:$Sm))]>;
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[(set SPR:$Sd, (fmul SPR:$Sn, SPR:$Sm))]>;
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def VNMULD : ADbI<0b11100, 0b10, 1, 0, (outs DPR:$dst), (ins DPR:$a, DPR:$b),
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def VNMULD : ADbI_Encode<0b11100, 0b10, 1, 0,
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IIC_fpMUL64, "vnmul", ".f64\t$dst, $a, $b",
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(outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
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[(set DPR:$dst, (fneg (fmul DPR:$a, (f64 DPR:$b))))]>;
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IIC_fpMUL64, "vnmul", ".f64\t$Dd, $Dn, $Dm",
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[(set DPR:$Dd, (fneg (fmul DPR:$Dn, (f64 DPR:$Dm))))]>;
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def VNMULS : ASbI<0b11100, 0b10, 1, 0, (outs SPR:$dst), (ins SPR:$a, SPR:$b),
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def VNMULS : ASbI_Encode<0b11100, 0b10, 1, 0,
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IIC_fpMUL32, "vnmul", ".f32\t$dst, $a, $b",
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(outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm),
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[(set SPR:$dst, (fneg (fmul SPR:$a, SPR:$b)))]>;
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IIC_fpMUL32, "vnmul", ".f32\t$Sd, $Sn, $Sm",
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[(set SPR:$Sd, (fneg (fmul SPR:$Sn, SPR:$Sm)))]>;
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// Match reassociated forms only if not sign dependent rounding.
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// Match reassociated forms only if not sign dependent rounding.
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def : Pat<(fmul (fneg DPR:$a), (f64 DPR:$b)),
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def : Pat<(fmul (fneg DPR:$a), (f64 DPR:$b)),
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@ -70,6 +70,25 @@ entry:
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ret float %mul
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ret float %mul
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}
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}
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define double @f9(double %a, double %b) nounwind readnone {
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entry:
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; CHECK: f9
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; CHECK: vnmul.f64 d16, d17, d16 @ encoding: [0xe0,0x0b,0x61,0xee]
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%mul = fmul double %a, %b
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%sub = fsub double -0.000000e+00, %mul
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ret double %sub
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}
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define void @f10(float %a, float %b, float* %c) nounwind readnone {
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entry:
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; CHECK: f10
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; CHECK: vnmul.f32 s0, s1, s0 @ encoding: [0xc0,0x0a,0x20,0xee]
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%mul = fmul float %a, %b
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%sub = fsub float -0.000000e+00, %mul
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store float %sub, float* %c, align 4
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ret void
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}
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define i1 @f100(double %a, double %b) nounwind readnone {
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define i1 @f100(double %a, double %b) nounwind readnone {
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entry:
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entry:
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; CHECK: f100
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; CHECK: f100
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