forked from OSchip/llvm-project
[x86] Infer disassembler mode from SubtargetInfo feature bits
Aside from cleaning up the code, this also adds support for the -code16 environment and actually enables the MODE_16BIT mode that was previously not accessible. There is no point adding any testing for 16-bit yet though; basically nothing will work because we aren't handling the OpSize prefix correctly for 16-bit mode. llvm-svn: 199649
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@ -31,6 +31,8 @@
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#include "X86GenRegisterInfo.inc"
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#define GET_INSTRINFO_ENUM
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#include "X86GenInstrInfo.inc"
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#define GET_SUBTARGETINFO_ENUM
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#include "X86GenSubtargetInfo.inc"
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using namespace llvm;
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using namespace llvm::X86Disassembler;
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@ -73,9 +75,23 @@ static bool translateInstruction(MCInst &target,
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const MCDisassembler *Dis);
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X86GenericDisassembler::X86GenericDisassembler(const MCSubtargetInfo &STI,
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DisassemblerMode mode,
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const MCInstrInfo *MII)
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: MCDisassembler(STI), MII(MII), fMode(mode) {}
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: MCDisassembler(STI), MII(MII) {
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switch (STI.getFeatureBits() &
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(X86::Mode16Bit | X86::Mode32Bit | X86::Mode64Bit)) {
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case X86::Mode16Bit:
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fMode = MODE_16BIT;
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break;
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case X86::Mode32Bit:
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fMode = MODE_32BIT;
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break;
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case X86::Mode64Bit:
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fMode = MODE_64BIT;
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break;
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default:
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llvm_unreachable("Invalid CPU mode");
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}
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}
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X86GenericDisassembler::~X86GenericDisassembler() {
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delete MII;
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@ -737,22 +753,16 @@ static bool translateInstruction(MCInst &mcInst,
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return false;
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}
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static MCDisassembler *createX86_32Disassembler(const Target &T,
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const MCSubtargetInfo &STI) {
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return new X86Disassembler::X86GenericDisassembler(STI, MODE_32BIT,
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T.createMCInstrInfo());
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}
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static MCDisassembler *createX86_64Disassembler(const Target &T,
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const MCSubtargetInfo &STI) {
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return new X86Disassembler::X86GenericDisassembler(STI, MODE_64BIT,
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static MCDisassembler *createX86Disassembler(const Target &T,
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const MCSubtargetInfo &STI) {
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return new X86Disassembler::X86GenericDisassembler(STI,
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T.createMCInstrInfo());
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}
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extern "C" void LLVMInitializeX86Disassembler() {
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// Register the disassembler.
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TargetRegistry::RegisterMCDisassembler(TheX86_32Target,
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createX86_32Disassembler);
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createX86Disassembler);
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TargetRegistry::RegisterMCDisassembler(TheX86_64Target,
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createX86_64Disassembler);
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createX86Disassembler);
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}
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@ -105,9 +105,7 @@ class X86GenericDisassembler : public MCDisassembler {
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public:
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/// Constructor - Initializes the disassembler.
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///
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/// @param mode - The X86 architecture mode to decode for.
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X86GenericDisassembler(const MCSubtargetInfo &STI, DisassemblerMode mode,
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const MCInstrInfo *MII);
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X86GenericDisassembler(const MCSubtargetInfo &STI, const MCInstrInfo *MII);
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private:
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~X86GenericDisassembler();
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public:
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