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Remove unneeded intrinsics from Blackfin backend. 

__builtin_bfin_ones does the same as ctpop, so it can be implemented in the front-end.

__builtin_bfin_loadbytes loads from an unaligned pointer with the disalignexcpt instruction. It does the same as loading from a pointer with the low bits masked. It is better if the front-end creates a masked load. We can always instruction select the masked to disalignexcpt+load.

We keep csync/ssync/idle. These intrinsics represent instructions that need workarounds for some silicon revisions. We may even want to convert inline assembler to intrinsics to enable the workarounds.

llvm-svn: 77917
This commit is contained in:
Jakob Stoklund Olesen 2009-08-02 21:49:05 +00:00
parent 59a9468b22
commit 7dc3b72685
3 changed files with 1 additions and 37 deletions
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17
llvm/include/llvm/IntrinsicsBlackfin.td
View File

@ -32,20 +32,3 @@ let TargetPrefix = "bfin" in {
Intrinsic<[llvm_void_ty]>;
}
//===----------------------------------------------------------------------===//
// Miscellaneous GCC-compatible builtins.
//
let TargetPrefix = "bfin" in {
// Almost identical to ctpop except for the type signature
def int_bfin_ones : GCCBuiltin<"__builtin_bfin_ones">,
Intrinsic<[llvm_i16_ty], [llvm_i32_ty], [IntrNoMem]>;
// Load unaligned pointer, ignoring the low bits. Like *(p&~3).
// This uses the disalignexcpt instruction
def int_bfin_loadbytes : GCCBuiltin<"__builtin_bfin_loadbytes">,
Intrinsic<[llvm_i32_ty], [llvm_ptr_ty], [IntrReadArgMem]>;
}

8
llvm/lib/Target/Blackfin/BlackfinInstrInfo.td
View File

@ -672,9 +672,8 @@ def NBITTST: F1<(outs JustCC:$cc), (ins D:$src1, uimm5mask:$src2),
def ONES: F2<(outs D16L:$dst), (ins D:$src),
"$dst = ones $src;",
[(set D16L:$dst, (int_bfin_ones D:$src))]>;
[(set D16L:$dst, (trunc (ctpop D:$src)))]>;
def : Pat<(i16 (trunc (ctpop D:$src))), (ONES D:$src)>;
def : Pat<(ctpop D:$src), (MOVEzext (ONES D:$src))>;
//===----------------------------------------------------------------------===//
@ -848,11 +847,6 @@ def ALIGN24 : F2<(outs D:$dst), (ins D:$src1, D:$src2),
def DISALGNEXCPT : F2<(outs), (ins), "disalignexcpt;", []>;
// This is really two instructions in parallel, but we don't support vliw yet
def DISALGNEXCPT_LOAD : F2<(outs D:$dst), (ins I:$ptr),
"disalignexcpt \\|\\| $dst = [$ptr];",
[(set D:$dst, (int_bfin_loadbytes I:$ptr))]>;
// TODO: BYTEOP3P, BYTEOP16P, BYTEOP1P, BYTEOP2P, BYTEOP16M, SAA,
// BYTEPACK, BYTEUNPACK

13
llvm/test/CodeGen/Blackfin/load-intr.ll
View File

@ -1,13 +0,0 @@
; RUN: llvm-as < %s | llc -march=bfin -verify-machineinstrs | FileCheck %s
define i16 @f(i32* %p) nounwind {
entry:
; CHECK: disalignexcpt || r0 = [i0];
%b = call i32 @llvm.bfin.loadbytes(i32* %p)
; CHECK: r0.l = ones r0;
%c = call i16 @llvm.bfin.ones(i32 %b)
ret i16 %c
}
declare void @llvm.bfin.ones() nounwind
declare void @llvm.bfin.loadbytes() nounwind