Provide generic hooks for icache invalidation. Add PPC implementation.

Patch by Gary Benson!

llvm-svn: 52418

llvm/include/llvm/Target/TargetJITInfo.h

@@ -94,6 +94,11 @@ namespace llvm {
       assert(NumRelocs == 0 && "This target does not have relocations!");
     }
 
+    /// InvalidateInstructionCache - Before the JIT can run a block of code
+    // that has been emitted it must invalidate the instruction cache on some
+    // platforms.
+    virtual void InvalidateInstructionCache(const void *Addr, unsigned len) {}
+
     /// needsGOT - Allows a target to specify that it would like the
     // JIT to manage a GOT for it.
     bool needsGOT() const { return useGOT; }

llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp

@@ -145,20 +145,6 @@ namespace {
 
 JITResolver *JITResolver::TheJITResolver = 0;
 
-#if (defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)) && \
-    defined(__APPLE__)
-extern "C" void sys_icache_invalidate(const void *Addr, size_t len);
-#endif
-
-/// synchronizeICache - On some targets, the JIT emitted code must be
-/// explicitly refetched to ensure correct execution.
-static void synchronizeICache(const void *Addr, size_t len) {
-#if (defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)) && \
-    defined(__APPLE__)
-  sys_icache_invalidate(Addr, len);
-#endif
-}
-
 /// getFunctionStub - This returns a pointer to a function stub, creating
 /// one on demand as needed.
 void *JITResolver::getFunctionStub(Function *F) {
@@ -756,7 +742,7 @@ bool JITEmitter::finishFunction(MachineFunction &F) {
   }
 
   // Invalidate the icache if necessary.
-  synchronizeICache(FnStart, FnEnd-FnStart);
+  TheJIT->getJITInfo().InvalidateInstructionCache(FnStart, FnEnd-FnStart);
   
   // Add it to the JIT symbol table if the host wants it.
   AddFunctionToSymbolTable(F.getFunction()->getNameStart(),

llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp

@@ -80,10 +80,6 @@ FunctionPass *llvm::createPPCCodeEmitterPass(PPCTargetMachine &TM,
   return new PPCCodeEmitter(TM, MCE);
 }
 
-#ifdef __APPLE__ 
-extern "C" void sys_icache_invalidate(const void *Addr, size_t len);
-#endif
-
 bool PPCCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
   assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
           MF.getTarget().getRelocationModel() != Reloc::Static) &&

llvm/lib/Target/PowerPC/PPCJITInfo.cpp

@@ -330,12 +330,9 @@ defined(__APPLE__)
 extern "C" void sys_icache_invalidate(const void *Addr, size_t len);
 #endif
 
-/// SyncICache - On PPC, the JIT emitted code must be explicitly refetched to
-/// ensure correct execution.
-static void SyncICache(const void *Addr, size_t len) {
-#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
-  
-#ifdef __APPLE__
+void PPCJITInfo::InvalidateInstructionCache(const void *Addr, unsigned len) {
+#if (defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)) && \
+defined(__APPLE__)  
   sys_icache_invalidate(Addr, len);
 #elif defined(__GNUC__)
   const size_t LineSize = 32;
@@ -352,8 +349,6 @@ static void SyncICache(const void *Addr, size_t len) {
       asm volatile("icbi 0, %0" : : "r"(Line));
   asm volatile("isync");
 #endif
-  
-#endif
 }
 
 void *PPCJITInfo::emitFunctionStub(const Function* F, void *Fn,
@@ -372,7 +367,7 @@ void *PPCJITInfo::emitFunctionStub(const Function* F, void *Fn,
     MCE.emitWordBE(0);
     MCE.emitWordBE(0);
     EmitBranchToAt(Addr, (intptr_t)Fn, false, is64Bit);
-    SyncICache((void*)Addr, 7*4);
+    InvalidateInstructionCache((void*)Addr, 7*4);
     return MCE.finishFunctionStub(F);
   }
 
@@ -400,7 +395,7 @@ void *PPCJITInfo::emitFunctionStub(const Function* F, void *Fn,
   MCE.emitWordBE(0);
   MCE.emitWordBE(0);
   EmitBranchToAt(BranchAddr, (intptr_t)Fn, true, is64Bit);
-  SyncICache((void*)Addr, 10*4);
+  InvalidateInstructionCache((void*)Addr, 10*4);
   return MCE.finishFunctionStub(F);
 }
 

llvm/lib/Target/PowerPC/PPCJITInfo.h

@@ -41,6 +41,11 @@ namespace llvm {
     /// code.
     ///
     virtual void replaceMachineCodeForFunction(void *Old, void *New);
+
+    /// InvalidateInstructionCache - Before the JIT can run a block of code
+    // that has been emitted it must invalidate the instruction cache on some
+    // platforms.
+    virtual void InvalidateInstructionCache(const void *Addr, unsigned len);
   };
 }