forked from OSchip/llvm-project
[SystemZ] Add AHIK and AGHIK
I did these as a separate patch because it uses a slightly different form of RIE layout. llvm-svn: 186687
This commit is contained in:
Richard Sandiford
parent
c575df6dcc
commit
7d6a453623
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@ -181,6 +181,23 @@ class InstRIEc<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
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let Inst{7-0} = op{7-0};
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}
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class InstRIEd<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstSystemZ<6, outs, ins, asmstr, pattern> {
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field bits<48> Inst;
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field bits<48> SoftFail = 0;
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bits<4> R1;
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bits<4> R3;
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bits<16> I2;
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let Inst{47-40} = op{15-8};
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let Inst{39-36} = R1;
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let Inst{35-32} = R3;
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let Inst{31-16} = I2;
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let Inst{15-8} = 0;
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let Inst{7-0} = op{7-0};
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}
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class InstRIEf<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstSystemZ<6, outs, ins, asmstr, pattern> {
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field bits<48> Inst;
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@ -768,6 +785,24 @@ class BinaryRI<string mnemonic, bits<12> opcode, SDPatternOperator operator,
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let DisableEncoding = "$R1src";
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}
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class BinaryRIE<string mnemonic, bits<16> opcode, SDPatternOperator operator,
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RegisterOperand cls, Immediate imm>
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: InstRIEd<opcode, (outs cls:$R1), (ins cls:$R3, imm:$I2),
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mnemonic#"\t$R1, $R3, $I2",
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[(set cls:$R1, (operator cls:$R3, imm:$I2))]>;
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multiclass BinaryRIAndK<string mnemonic, bits<12> opcode1, bits<16> opcode2,
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SDPatternOperator operator, RegisterOperand cls,
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Immediate imm> {
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let NumOpsKey = mnemonic in {
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let NumOpsValue = "3" in
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def K : BinaryRIE<mnemonic##"k", opcode2, null_frag, cls, imm>,
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Requires<[FeatureDistinctOps]>;
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let NumOpsValue = "2", isConvertibleToThreeAddress = 1 in
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def "" : BinaryRI<mnemonic, opcode1, operator, cls, imm>;
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}
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}
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class BinaryRIL<string mnemonic, bits<12> opcode, SDPatternOperator operator,
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RegisterOperand cls, Immediate imm>
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: InstRIL<opcode, (outs cls:$R1), (ins cls:$R1src, imm:$I2),
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@ -541,8 +541,8 @@ let Defs = [CC] in {
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def AGFR : BinaryRRE<"agf", 0xB918, null_frag, GR64, GR32>;
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// Addition of signed 16-bit immediates.
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def AHI : BinaryRI<"ahi", 0xA7A, add, GR32, imm32sx16>;
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def AGHI : BinaryRI<"aghi", 0xA7B, add, GR64, imm64sx16>;
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defm AHI : BinaryRIAndK<"ahi", 0xA7A, 0xECD8, add, GR32, imm32sx16>;
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defm AGHI : BinaryRIAndK<"aghi", 0xA7B, 0xECD9, add, GR64, imm64sx16>;
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// Addition of signed 32-bit immediates.
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def AFI : BinaryRIL<"afi", 0xC29, add, GR32, simm32>;
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@ -0,0 +1,67 @@
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; Test 32-bit addition in which the second operand is constant and in which
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; three-operand forms are available.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
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; Check additions of 1.
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define i32 @f1(i32 %a, i32 %b) {
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; CHECK-LABEL: f1:
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; CHECK: ahik %r2, %r3, 1
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; CHECK: br %r14
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%add = add i32 %b, 1
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ret i32 %add
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}
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; Check the high end of the AHIK range.
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define i32 @f2(i32 %a, i32 %b) {
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; CHECK-LABEL: f2:
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; CHECK: ahik %r2, %r3, 32767
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; CHECK: br %r14
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%add = add i32 %b, 32767
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ret i32 %add
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}
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; Check the next value up, which must use AFI instead.
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define i32 @f3(i32 %a, i32 %b) {
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; CHECK-LABEL: f3:
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; CHECK: afi {{%r[0-5]}}, 32768
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; CHECK: br %r14
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%add = add i32 %b, 32768
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ret i32 %add
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}
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; Check the high end of the negative AHIK range.
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define i32 @f4(i32 %a, i32 %b) {
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; CHECK-LABEL: f4:
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; CHECK: ahik %r2, %r3, -1
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; CHECK: br %r14
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%add = add i32 %b, -1
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ret i32 %add
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}
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; Check the low end of the AHIK range.
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define i32 @f5(i32 %a, i32 %b) {
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; CHECK-LABEL: f5:
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; CHECK: ahik %r2, %r3, -32768
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; CHECK: br %r14
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%add = add i32 %b, -32768
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ret i32 %add
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}
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; Check the next value down, which must use AFI instead.
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define i32 @f6(i32 %a, i32 %b) {
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; CHECK-LABEL: f6:
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; CHECK: afi {{%r[0-5]}}, -32769
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; CHECK: br %r14
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%add = add i32 %b, -32769
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ret i32 %add
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}
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; Check that AHI is still used in obvious cases.
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define i32 @f7(i32 %a) {
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; CHECK-LABEL: f7:
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; CHECK: ahi %r2, 1
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; CHECK: br %r14
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%add = add i32 %a, 1
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ret i32 %add
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}
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@ -0,0 +1,67 @@
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; Test 64-bit addition in which the second operand is constant and in which
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; three-operand forms are available.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
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; Check additions of 1.
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define i64 @f1(i64 %a, i64 %b) {
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; CHECK-LABEL: f1:
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; CHECK: {{aghik %r2, %r3, 1|la %r2, 1\(%r3\)}}
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; CHECK: br %r14
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%add = add i64 %b, 1
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ret i64 %add
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}
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; Check the high end of the AGHIK range.
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define i64 @f2(i64 %a, i64 %b) {
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; CHECK-LABEL: f2:
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; CHECK: aghik %r2, %r3, 32767
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; CHECK: br %r14
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%add = add i64 %b, 32767
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ret i64 %add
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}
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; Check the next value up, which must use AGFI instead.
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define i64 @f3(i64 %a, i64 %b) {
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; CHECK-LABEL: f3:
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; CHECK: {{agfi %r[0-5], 32768|lay %r2, 32768\(%r3\)}}
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; CHECK: br %r14
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%add = add i64 %b, 32768
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ret i64 %add
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}
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; Check the high end of the negative AGHIK range.
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define i64 @f4(i64 %a, i64 %b) {
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; CHECK-LABEL: f4:
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; CHECK: aghik %r2, %r3, -1
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; CHECK: br %r14
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%add = add i64 %b, -1
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ret i64 %add
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}
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; Check the low end of the AGHIK range.
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define i64 @f5(i64 %a, i64 %b) {
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; CHECK-LABEL: f5:
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; CHECK: aghik %r2, %r3, -32768
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; CHECK: br %r14
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%add = add i64 %b, -32768
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ret i64 %add
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}
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; Check the next value down, which must use AGFI instead.
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define i64 @f6(i64 %a, i64 %b) {
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; CHECK-LABEL: f6:
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; CHECK: {{agfi %r[0-5], -32769|lay %r2, -32769\(%r3\)}}
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; CHECK: br %r14
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%add = add i64 %b, -32769
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ret i64 %add
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}
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; Check that AGHI is still used in obvious cases.
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define i64 @f7(i64 %a) {
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; CHECK-LABEL: f7:
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; CHECK: aghi %r2, 32000
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; CHECK: br %r14
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%add = add i64 %a, 32000
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ret i64 %add
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}
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@ -163,6 +163,21 @@
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# CHECK: aghi %r15, 0
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0xa7 0xfb 0x00 0x00
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# CHECK: aghik %r0, %r1, -32768
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0xec 0x01 0x80 0x00 0x00 0xd9
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# CHECK: aghik %r2, %r3, -1
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0xec 0x23 0xff 0xff 0x00 0xd9
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# CHECK: aghik %r4, %r5, 0
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0xec 0x45 0x00 0x00 0x00 0xd9
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# CHECK: aghik %r6, %r7, 1
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0xec 0x67 0x00 0x01 0x00 0xd9
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# CHECK: aghik %r8, %r15, 32767
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0xec 0x8f 0x7f 0xff 0x00 0xd9
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# CHECK: agr %r0, %r0
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0xb9 0x08 0x00 0x00
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@ -268,6 +283,21 @@
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# CHECK: ahi %r15, 0
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0xa7 0xfa 0x00 0x00
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# CHECK: ahik %r0, %r1, -32768
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0xec 0x01 0x80 0x00 0x00 0xd8
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# CHECK: ahik %r2, %r3, -1
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0xec 0x23 0xff 0xff 0x00 0xd8
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# CHECK: ahik %r4, %r5, 0
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0xec 0x45 0x00 0x00 0x00 0xd8
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# CHECK: ahik %r6, %r7, 1
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0xec 0x67 0x00 0x01 0x00 0xd8
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# CHECK: ahik %r8, %r15, 32767
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0xec 0x8f 0x7f 0xff 0x00 0xd8
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# CHECK: ah %r0, 0
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0x4a 0x00 0x00 0x00
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@ -1,6 +1,29 @@
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# For z196 only.
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# RUN: not llvm-mc -triple s390x-linux-gnu -mcpu=z196 < %s 2> %t
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# RUN: FileCheck < %t %s
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#CHECK: error: invalid operand
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#CHECK: aghik %r0, %r1, -32769
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#CHECK: error: invalid operand
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#CHECK: aghik %r0, %r1, 32768
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#CHECK: error: invalid operand
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#CHECK: aghik %r0, %r1, foo
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aghik %r0, %r1, -32769
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aghik %r0, %r1, 32768
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aghik %r0, %r1, foo
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#CHECK: error: invalid operand
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#CHECK: ahik %r0, %r1, -32769
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#CHECK: error: invalid operand
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#CHECK: ahik %r0, %r1, 32768
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#CHECK: error: invalid operand
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#CHECK: ahik %r0, %r1, foo
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ahik %r0, %r1, -32769
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ahik %r0, %r1, 32768
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ahik %r0, %r1, foo
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#CHECK: error: invalid operand
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#CHECK: sllk %r0,%r0,-524289
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#CHECK: error: invalid operand
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@ -69,6 +69,11 @@
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aghi %r0, 32768
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aghi %r0, foo
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#CHECK: error: {{(instruction requires: distinct-ops)?}}
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#CHECK: aghik %r1, %r2, 3
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aghik %r1, %r2, 3
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#CHECK: error: {{(instruction requires: distinct-ops)?}}
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#CHECK: agrk %r2,%r3,%r4
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@ -110,6 +115,11 @@
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ahi %r0, 32768
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ahi %r0, foo
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#CHECK: error: {{(instruction requires: distinct-ops)?}}
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#CHECK: ahik %r1, %r2, 3
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ahik %r1, %r2, 3
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#CHECK: error: invalid operand
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#CHECK: ahy %r0, -524289
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#CHECK: error: invalid operand
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@ -1,6 +1,24 @@
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# For z196 and above.
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# RUN: llvm-mc -triple s390x-linux-gnu -mcpu=z196 -show-encoding %s | FileCheck %s
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#CHECK: aghik %r0, %r0, -32768 # encoding: [0xec,0x00,0x80,0x00,0x00,0xd9]
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#CHECK: aghik %r0, %r0, -1 # encoding: [0xec,0x00,0xff,0xff,0x00,0xd9]
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#CHECK: aghik %r0, %r0, 0 # encoding: [0xec,0x00,0x00,0x00,0x00,0xd9]
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#CHECK: aghik %r0, %r0, 1 # encoding: [0xec,0x00,0x00,0x01,0x00,0xd9]
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#CHECK: aghik %r0, %r0, 32767 # encoding: [0xec,0x00,0x7f,0xff,0x00,0xd9]
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#CHECK: aghik %r0, %r15, 0 # encoding: [0xec,0x0f,0x00,0x00,0x00,0xd9]
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#CHECK: aghik %r15, %r0, 0 # encoding: [0xec,0xf0,0x00,0x00,0x00,0xd9]
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#CHECK: aghik %r7, %r8, -16 # encoding: [0xec,0x78,0xff,0xf0,0x00,0xd9]
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aghik %r0, %r0, -32768
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aghik %r0, %r0, -1
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aghik %r0, %r0, 0
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aghik %r0, %r0, 1
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aghik %r0, %r0, 32767
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aghik %r0, %r15, 0
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aghik %r15, %r0, 0
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aghik %r7, %r8, -16
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#CHECK: agrk %r0, %r0, %r0 # encoding: [0xb9,0xe8,0x00,0x00]
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#CHECK: agrk %r0, %r0, %r15 # encoding: [0xb9,0xe8,0xf0,0x00]
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#CHECK: agrk %r0, %r15, %r0 # encoding: [0xb9,0xe8,0x00,0x0f]
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@ -13,6 +31,24 @@
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agrk %r15,%r0,%r0
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agrk %r7,%r8,%r9
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#CHECK: ahik %r0, %r0, -32768 # encoding: [0xec,0x00,0x80,0x00,0x00,0xd8]
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#CHECK: ahik %r0, %r0, -1 # encoding: [0xec,0x00,0xff,0xff,0x00,0xd8]
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#CHECK: ahik %r0, %r0, 0 # encoding: [0xec,0x00,0x00,0x00,0x00,0xd8]
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#CHECK: ahik %r0, %r0, 1 # encoding: [0xec,0x00,0x00,0x01,0x00,0xd8]
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#CHECK: ahik %r0, %r0, 32767 # encoding: [0xec,0x00,0x7f,0xff,0x00,0xd8]
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#CHECK: ahik %r0, %r15, 0 # encoding: [0xec,0x0f,0x00,0x00,0x00,0xd8]
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#CHECK: ahik %r15, %r0, 0 # encoding: [0xec,0xf0,0x00,0x00,0x00,0xd8]
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#CHECK: ahik %r7, %r8, -16 # encoding: [0xec,0x78,0xff,0xf0,0x00,0xd8]
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ahik %r0, %r0, -32768
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ahik %r0, %r0, -1
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ahik %r0, %r0, 0
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ahik %r0, %r0, 1
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ahik %r0, %r0, 32767
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ahik %r0, %r15, 0
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ahik %r15, %r0, 0
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ahik %r7, %r8, -16
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#CHECK: ark %r0, %r0, %r0 # encoding: [0xb9,0xf8,0x00,0x00]
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#CHECK: ark %r0, %r0, %r15 # encoding: [0xb9,0xf8,0xf0,0x00]
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#CHECK: ark %r0, %r15, %r0 # encoding: [0xb9,0xf8,0x00,0x0f]
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