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Add some patterns for PIC PC-relative loads and stores. 

llvm-svn: 37269
This commit is contained in:
Dale Johannesen 2007-05-21 22:14:33 +00:00
parent 147b334b6a
commit 7d55f3733e
1 changed files with 41 additions and 2 deletions
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41
llvm/lib/Target/ARM/ARMInstrInfo.td
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@ -554,11 +554,50 @@ PseudoInst<(ops i32imm:$line, i32imm:$col, i32imm:$file),
def PICADD : AXI1<(ops GPR:$dst, GPR:$a, pclabel:$cp, pred:$p), def PICADD : AXI1<(ops GPR:$dst, GPR:$a, pclabel:$cp, pred:$p),
"$cp:\n\tadd$p $dst, pc, $a", "$cp:\n\tadd$p $dst, pc, $a",
[(set GPR:$dst, (ARMpic_add GPR:$a, imm:$cp))]>; [(set GPR:$dst, (ARMpic_add GPR:$a, imm:$cp))]>;
let AddedComplexity = 10 in
let isLoad = 1, AddedComplexity = 10 in {
def PICLD : AXI2<(ops GPR:$dst, addrmodepc:$addr, pred:$p), def PICLD : AXI2<(ops GPR:$dst, addrmodepc:$addr, pred:$p),
"${addr:label}:\n\tldr$p $dst, $addr", "${addr:label}:\n\tldr$p $dst, $addr",
[(set GPR:$dst, (load addrmodepc:$addr))]>; [(set GPR:$dst, (load addrmodepc:$addr))]>;
def PICLDZH : AXI2<(ops GPR:$dst, addrmodepc:$addr, pred:$p),
"${addr:label}:\n\tldr${p}h $dst, $addr",
[(set GPR:$dst, (zextloadi16 addrmodepc:$addr))]>;
def PICLDZB : AXI2<(ops GPR:$dst, addrmodepc:$addr, pred:$p),
"${addr:label}:\n\tldr${p}b $dst, $addr",
[(set GPR:$dst, (zextloadi8 addrmodepc:$addr))]>;
def PICLDH : AXI2<(ops GPR:$dst, addrmodepc:$addr, pred:$p),
"${addr:label}:\n\tldr${p}h $dst, $addr",
[(set GPR:$dst, (extloadi16 addrmodepc:$addr))]>;
def PICLDB : AXI2<(ops GPR:$dst, addrmodepc:$addr, pred:$p),
"${addr:label}:\n\tldr${p}b $dst, $addr",
[(set GPR:$dst, (extloadi8 addrmodepc:$addr))]>;
def PICLDSH : AXI2<(ops GPR:$dst, addrmodepc:$addr, pred:$p),
"${addr:label}:\n\tldr${p}sh $dst, $addr",
[(set GPR:$dst, (sextloadi16 addrmodepc:$addr))]>;
def PICLDSB : AXI2<(ops GPR:$dst, addrmodepc:$addr, pred:$p),
"${addr:label}:\n\tldr${p}sb $dst, $addr",
[(set GPR:$dst, (sextloadi8 addrmodepc:$addr))]>;
}
let isStore = 1, AddedComplexity = 10 in {
def PICSTR : AXI2<(ops GPR:$src, addrmodepc:$addr, pred:$p),
"${addr:label}:\n\tstr$p $src, $addr",
[(store GPR:$src, addrmodepc:$addr)]>;
def PICSTRH : AXI2<(ops GPR:$src, addrmodepc:$addr, pred:$p),
"${addr:label}:\n\tstr${p}h $src, $addr",
[(truncstorei16 GPR:$src, addrmodepc:$addr)]>;
def PICSTRB : AXI2<(ops GPR:$src, addrmodepc:$addr, pred:$p),
"${addr:label}:\n\tstr${p}b $src, $addr",
[(truncstorei8 GPR:$src, addrmodepc:$addr)]>;
}
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Control Flow Instructions. // Control Flow Instructions.
// //