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Add reg-imm tests 

llvm-svn: 84705
This commit is contained in:
Anton Korobeynikov 2009-10-21 00:11:44 +00:00
parent 7fbc0a50d5
commit 7cea91e171
2 changed files with 74 additions and 0 deletions
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37
llvm/test/CodeGen/MSP430/Inst16ri.ll Normal file
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; RUN: llc -march=msp430 < %s | FileCheck %s
target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
target triple = "msp430-generic-generic"
define i16 @mov() nounwind {
; CHECK: mov:
; CHECK: mov.w #1, r15
ret i16 1
}
define i16 @add(i16 %a, i16 %b) nounwind {
; CHECK: add:
; CHECK: add.w #1, r15
%1 = add i16 %a, 1
ret i16 %1
}
define i16 @and(i16 %a, i16 %b) nounwind {
; CHECK: and:
; CHECK: and.w #1, r15
%1 = and i16 %a, 1
ret i16 %1
}
define i16 @bis(i16 %a, i16 %b) nounwind {
; CHECK: bis:
; CHECK: bis.w #1, r15
%1 = or i16 %a, 1
ret i16 %1
}
define i16 @xor(i16 %a, i16 %b) nounwind {
; CHECK: xor:
; CHECK: xor.w #1, r15
%1 = xor i16 %a, 1
ret i16 %1
}

37
llvm/test/CodeGen/MSP430/Inst8ri.ll Normal file
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@ -0,0 +1,37 @@
; RUN: llc -march=msp430 < %s | FileCheck %s
target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
target triple = "msp430-generic-generic"
define i8 @mov() nounwind {
; CHECK: mov:
; CHECK: mov.b #1, r15
ret i8 1
}
define i8 @add(i8 %a, i8 %b) nounwind {
; CHECK: add:
; CHECK: add.b #1, r15
%1 = add i8 %a, 1
ret i8 %1
}
define i8 @and(i8 %a, i8 %b) nounwind {
; CHECK: and:
; CHECK: and.b #1, r15
%1 = and i8 %a, 1
ret i8 %1
}
define i8 @bis(i8 %a, i8 %b) nounwind {
; CHECK: bis:
; CHECK: bis.b #1, r15
%1 = or i8 %a, 1
ret i8 %1
}
define i8 @xor(i8 %a, i8 %b) nounwind {
; CHECK: xor:
; CHECK: xor.b #1, r15
%1 = xor i8 %a, 1
ret i8 %1
}