forked from OSchip/llvm-project
[InstCombine] Fold sdiv exact X, -1<<C --> -(ashr exact X, C)
While that does increases instruction count, shift is obviously better than a division. Name: base Pre: (1<<C1) >= 0 %o0 = shl i8 1, C1 %r = sdiv exact i8 C0, %o0 => %r = ashr exact i8 C0, C1 Name: neg %o0 = shl i8 -1, C1 %r = sdiv exact i8 C0, %o0 => %t0 = ashr exact i8 C0, C1 %r = sub i8 0, %t0 Name: reverse Pre: C1 != 0 && C1 u< 8 %t0 = ashr exact i8 C0, C1 %r = sub i8 0, %t0 => %o0 = shl i8 -1, C1 %r = sdiv exact i8 C0, %o0 https://rise4fun.com/Alive/MRplf
This commit is contained in:
parent
47aec80e4a
commit
7ce76b06ec
|
@ -1131,9 +1131,20 @@ Instruction *InstCombinerImpl::visitSDiv(BinaryOperator &I) {
|
|||
return new ZExtInst(Builder.CreateICmpEQ(Op0, Op1), I.getType());
|
||||
|
||||
// sdiv exact X, 1<<C --> ashr exact X, C iff 1<<C is non-negative
|
||||
if (I.isExact() && match(Op1, m_Power2()) && match(Op1, m_NonNegative()))
|
||||
return BinaryOperator::CreateExactAShr(
|
||||
// sdiv exact X, -1<<C --> -(ashr exact X, C)
|
||||
if (I.isExact() && ((match(Op1, m_Power2()) && match(Op1, m_NonNegative())) ||
|
||||
match(Op1, m_NegatedPower2()))) {
|
||||
bool DivisorWasNegative = match(Op1, m_NegatedPower2());
|
||||
if (DivisorWasNegative)
|
||||
Op1 = ConstantExpr::getNeg(cast<Constant>(Op1));
|
||||
auto *AShr = BinaryOperator::CreateExactAShr(
|
||||
Op0, getLogBase2(I.getType(), cast<Constant>(Op1)), I.getName());
|
||||
if (!DivisorWasNegative)
|
||||
return AShr;
|
||||
Builder.Insert(AShr);
|
||||
AShr->setName(I.getName() + ".neg");
|
||||
return BinaryOperator::CreateNeg(AShr, I.getName());
|
||||
}
|
||||
|
||||
const APInt *Op1C;
|
||||
if (match(Op1, m_APInt(Op1C))) {
|
||||
|
|
|
@ -8,7 +8,8 @@
|
|||
|
||||
define i8 @t0(i8 %x) {
|
||||
; CHECK-LABEL: @t0(
|
||||
; CHECK-NEXT: [[DIV:%.*]] = sdiv exact i8 [[X:%.*]], -32
|
||||
; CHECK-NEXT: [[DIV_NEG:%.*]] = ashr exact i8 [[X:%.*]], 5
|
||||
; CHECK-NEXT: [[DIV:%.*]] = sub nsw i8 0, [[DIV_NEG]]
|
||||
; CHECK-NEXT: ret i8 [[DIV]]
|
||||
;
|
||||
%div = sdiv exact i8 %x, -32
|
||||
|
@ -25,7 +26,8 @@ define i8 @n1(i8 %x) {
|
|||
|
||||
define <2 x i8> @t2_vec_splat(<2 x i8> %x) {
|
||||
; CHECK-LABEL: @t2_vec_splat(
|
||||
; CHECK-NEXT: [[DIV:%.*]] = sdiv exact <2 x i8> [[X:%.*]], <i8 -32, i8 -32>
|
||||
; CHECK-NEXT: [[DIV_NEG:%.*]] = ashr exact <2 x i8> [[X:%.*]], <i8 5, i8 5>
|
||||
; CHECK-NEXT: [[DIV:%.*]] = sub nsw <2 x i8> zeroinitializer, [[DIV_NEG]]
|
||||
; CHECK-NEXT: ret <2 x i8> [[DIV]]
|
||||
;
|
||||
%div = sdiv exact <2 x i8> %x, <i8 -32, i8 -32>
|
||||
|
@ -34,7 +36,8 @@ define <2 x i8> @t2_vec_splat(<2 x i8> %x) {
|
|||
|
||||
define <2 x i8> @t3_vec(<2 x i8> %x) {
|
||||
; CHECK-LABEL: @t3_vec(
|
||||
; CHECK-NEXT: [[DIV:%.*]] = sdiv exact <2 x i8> [[X:%.*]], <i8 -32, i8 -16>
|
||||
; CHECK-NEXT: [[DIV_NEG:%.*]] = ashr exact <2 x i8> [[X:%.*]], <i8 5, i8 4>
|
||||
; CHECK-NEXT: [[DIV:%.*]] = sub <2 x i8> zeroinitializer, [[DIV_NEG]]
|
||||
; CHECK-NEXT: ret <2 x i8> [[DIV]]
|
||||
;
|
||||
%div = sdiv exact <2 x i8> %x, <i8 -32, i8 -16>
|
||||
|
|
Loading…
Reference in New Issue