forked from OSchip/llvm-project
[X86][SSE] Tests packuswb/truncation codegen from PR34773
llvm-svn: 316033
This commit is contained in:
Simon Pilgrim
parent
3dc67a1d8a
commit
7cd4e2c96f
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@ -1931,3 +1931,123 @@ entry:
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ret <16 x i8> %1
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}
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define void @PR34773(i16* %a0, i8* %a1) {
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; SSE-LABEL: PR34773:
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; SSE: # BB#0:
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; SSE-NEXT: movdqu (%rdi), %xmm0
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; SSE-NEXT: movdqu 16(%rdi), %xmm1
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; SSE-NEXT: movdqu 32(%rdi), %xmm2
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; SSE-NEXT: movdqu 48(%rdi), %xmm3
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; SSE-NEXT: psrlw $8, %xmm1
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; SSE-NEXT: psrlw $8, %xmm0
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; SSE-NEXT: packuswb %xmm1, %xmm0
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; SSE-NEXT: psrlw $8, %xmm3
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; SSE-NEXT: psrlw $8, %xmm2
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; SSE-NEXT: packuswb %xmm3, %xmm2
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; SSE-NEXT: movdqu %xmm0, (%rsi)
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; SSE-NEXT: movdqu %xmm2, 16(%rsi)
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; SSE-NEXT: retq
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;
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; AVX1-LABEL: PR34773:
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; AVX1: # BB#0:
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; AVX1-NEXT: vmovdqu (%rdi), %ymm0
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; AVX1-NEXT: vmovdqu 32(%rdi), %ymm1
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
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; AVX1-NEXT: vpsrlw $8, %xmm2, %xmm2
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; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
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; AVX1-NEXT: vpsrlw $8, %xmm3, %xmm3
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; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = <1,3,5,7,9,11,13,15,u,u,u,u,u,u,u,u>
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; AVX1-NEXT: vpshufb %xmm4, %xmm0, %xmm0
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; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
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; AVX1-NEXT: vpshufb %xmm5, %xmm2, %xmm2
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; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
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; AVX1-NEXT: vpshufb %xmm4, %xmm1, %xmm1
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; AVX1-NEXT: vpshufb %xmm5, %xmm3, %xmm2
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; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
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; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; AVX1-NEXT: vmovups %ymm0, (%rsi)
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; AVX1-NEXT: vzeroupper
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: PR34773:
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; AVX2: # BB#0:
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; AVX2-NEXT: vmovdqu (%rdi), %ymm0
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; AVX2-NEXT: vmovdqu 32(%rdi), %ymm1
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; AVX2-NEXT: vpsrlw $8, %ymm0, %ymm0
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; AVX2-NEXT: vpsrlw $8, %ymm1, %ymm1
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; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
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; AVX2-NEXT: vpackuswb %xmm2, %xmm0, %xmm0
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; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2
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; AVX2-NEXT: vpackuswb %xmm2, %xmm1, %xmm1
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; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
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; AVX2-NEXT: vmovdqu %ymm0, (%rsi)
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; AVX2-NEXT: vzeroupper
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; AVX2-NEXT: retq
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;
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; AVX512F-LABEL: PR34773:
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; AVX512F: # BB#0:
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; AVX512F-NEXT: vmovdqu (%rdi), %ymm0
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; AVX512F-NEXT: vmovdqu 32(%rdi), %ymm1
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; AVX512F-NEXT: vpsrlw $8, %ymm0, %ymm0
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; AVX512F-NEXT: vpsrlw $8, %ymm1, %ymm1
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; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0
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; AVX512F-NEXT: vpmovdb %zmm0, %xmm0
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; AVX512F-NEXT: vpmovsxwd %ymm1, %zmm1
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; AVX512F-NEXT: vpmovdb %zmm1, %xmm1
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; AVX512F-NEXT: vmovdqu %xmm0, (%rsi)
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; AVX512F-NEXT: vmovdqu %xmm1, 16(%rsi)
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; AVX512F-NEXT: vzeroupper
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; AVX512F-NEXT: retq
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;
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; AVX512VL-LABEL: PR34773:
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; AVX512VL: # BB#0:
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; AVX512VL-NEXT: vmovdqu (%rdi), %ymm0
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; AVX512VL-NEXT: vmovdqu 32(%rdi), %ymm1
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; AVX512VL-NEXT: vpsrlw $8, %ymm0, %ymm0
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; AVX512VL-NEXT: vpsrlw $8, %ymm1, %ymm1
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; AVX512VL-NEXT: vpmovsxwd %ymm0, %zmm0
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; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0
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; AVX512VL-NEXT: vpmovsxwd %ymm1, %zmm1
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; AVX512VL-NEXT: vpmovdb %zmm1, %xmm1
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; AVX512VL-NEXT: vmovdqu %xmm0, (%rsi)
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; AVX512VL-NEXT: vmovdqu %xmm1, 16(%rsi)
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; AVX512VL-NEXT: vzeroupper
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; AVX512VL-NEXT: retq
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;
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; AVX512BW-LABEL: PR34773:
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; AVX512BW: # BB#0:
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; AVX512BW-NEXT: vmovdqu (%rdi), %ymm0
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; AVX512BW-NEXT: vmovdqu 32(%rdi), %ymm1
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; AVX512BW-NEXT: vpsrlw $8, %ymm0, %ymm0
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; AVX512BW-NEXT: vpsrlw $8, %ymm1, %ymm1
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; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
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; AVX512BW-NEXT: vpmovwb %zmm1, %ymm1
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; AVX512BW-NEXT: vmovdqu %xmm0, (%rsi)
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; AVX512BW-NEXT: vmovdqu %xmm1, 16(%rsi)
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; AVX512BW-NEXT: vzeroupper
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; AVX512BW-NEXT: retq
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;
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; AVX512BWVL-LABEL: PR34773:
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; AVX512BWVL: # BB#0:
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; AVX512BWVL-NEXT: vpsrlw $8, (%rdi), %ymm0
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; AVX512BWVL-NEXT: vpsrlw $8, 32(%rdi), %ymm1
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; AVX512BWVL-NEXT: vpmovwb %ymm0, (%rsi)
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; AVX512BWVL-NEXT: vpmovwb %ymm1, 16(%rsi)
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; AVX512BWVL-NEXT: vzeroupper
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; AVX512BWVL-NEXT: retq
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%1 = getelementptr i16, i16* %a0, i64 16
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%2 = getelementptr i8, i8* %a1, i64 16
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%3 = bitcast i16* %a0 to <16 x i16>*
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%4 = bitcast i16* %1 to <16 x i16>*
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%5 = bitcast i8* %a1 to <16 x i8>*
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%6 = bitcast i8* %2 to <16 x i8>*
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%7 = load <16 x i16>, <16 x i16>* %3, align 2
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%8 = load <16 x i16>, <16 x i16>* %4, align 2
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%9 = lshr <16 x i16> %7, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
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%10 = lshr <16 x i16> %8, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
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%11 = trunc <16 x i16> %9 to <16 x i8>
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%12 = trunc <16 x i16> %10 to <16 x i8>
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store <16 x i8> %11, <16 x i8>* %5, align 1
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store <16 x i8> %12, <16 x i8>* %6, align 1
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ret void
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}
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