[ARM] GlobalISel: Use Subtarget in Legalizer

Start using the Subtarget to make decisions about what's legal. In particular,
we only mark floating point operations as legal if we have VFP2, which is
something we should've done from the very start.

llvm-svn: 295439

llvm/lib/Target/ARM/ARMLegalizerInfo.cpp

@@ -12,6 +12,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "ARMLegalizerInfo.h"
+#include "ARMSubtarget.h"
 #include "llvm/CodeGen/ValueTypes.h"
 #include "llvm/IR/DerivedTypes.h"
 #include "llvm/IR/Type.h"
@@ -23,7 +24,7 @@ using namespace llvm;
 #error "You shouldn't build this"
 #endif
 
-ARMLegalizerInfo::ARMLegalizerInfo() {
+ARMLegalizerInfo::ARMLegalizerInfo(const ARMSubtarget &ST) {
   using namespace TargetOpcode;
 
   const LLT p0 = LLT::pointer(0, 32);
@@ -40,11 +41,6 @@ ARMLegalizerInfo::ARMLegalizerInfo() {
     setAction({G_LOAD, Ty}, Legal);
   setAction({G_LOAD, 1, p0}, Legal);
 
-  // FIXME: This is strictly for loading double-precision floating point values,
-  // if the hardware allows it. We rely on the instruction selector to complain
-  // otherwise.
-  setAction({G_LOAD, s64}, Legal);
-
   for (auto Ty : {s1, s8, s16, s32})
     setAction({G_ADD, Ty}, Legal);
 
@@ -54,10 +50,12 @@ ARMLegalizerInfo::ARMLegalizerInfo() {
       setAction({Op, 1, Ty}, Legal);
   }
 
-  // FIXME: This is a bit sloppy, but for now we'll just rely on the instruction
-  // selector to complain if it doesn't support floating point.
-  setAction({G_FADD, s32}, Legal);
-  setAction({G_FADD, s64}, Legal);
+  if (ST.hasVFP2()) {
+    setAction({G_FADD, s32}, Legal);
+    setAction({G_FADD, s64}, Legal);
+
+    setAction({G_LOAD, s64}, Legal);
+  }
 
   computeTables();
 }

llvm/lib/Target/ARM/ARMLegalizerInfo.h

@@ -18,12 +18,12 @@
 
 namespace llvm {
 
-class LLVMContext;
+class ARMSubtarget;
 
 /// This class provides the information for the target register banks.
 class ARMLegalizerInfo : public LegalizerInfo {
 public:
-  ARMLegalizerInfo();
+  ARMLegalizerInfo(const ARMSubtarget &ST);
 };
 } // End llvm namespace.
 #endif

llvm/lib/Target/ARM/ARMTargetMachine.cpp

@@ -326,7 +326,7 @@ ARMBaseTargetMachine::getSubtargetImpl(const Function &F) const {
 #else
     ARMGISelActualAccessor *GISel = new ARMGISelActualAccessor();
     GISel->CallLoweringInfo.reset(new ARMCallLowering(*I->getTargetLowering()));
-    GISel->Legalizer.reset(new ARMLegalizerInfo());
+    GISel->Legalizer.reset(new ARMLegalizerInfo(*I));
 
     auto *RBI = new ARMRegisterBankInfo(*I->getRegisterInfo());
 

llvm/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir

@@ -8,10 +8,12 @@
   define void @test_add_s32() { ret void }
 
   define void @test_load_from_stack() { ret void }
-  define void @test_legal_loads() { ret void }
+  define void @test_legal_loads() #0 { ret void }
 
-  define void @test_fadd_s32() { ret void }
-  define void @test_fadd_s64() { ret void }
+  define void @test_fadd_s32() #0 { ret void }
+  define void @test_fadd_s64() #0 { ret void }
+
+  attributes #0 = { "target-features"="+vfp2" }
 ...
 ---
 name:            test_sext_s8