forked from OSchip/llvm-project
[AArch64] Improve access to fixed-width object when stack has SVE.
When the stack has SVE objects, fixed-width objects are often better accessed from the SP, instead of the FP, because part/all of the fixed-width offset can be folded into the (non-scalable) addressing mode, where otherwise an ADDVL would be required. Reviewed By: david-arm Differential Revision: https://reviews.llvm.org/D120738
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@ -2012,8 +2012,9 @@ StackOffset AArch64FrameLowering::resolveFrameOffsetReference(
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// right thing for the emergency spill slot.
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// right thing for the emergency spill slot.
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bool UseFP = false;
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bool UseFP = false;
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if (AFI->hasStackFrame() && !isSVE) {
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if (AFI->hasStackFrame() && !isSVE) {
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// We shouldn't prefer using the FP when there is an SVE area
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// We shouldn't prefer using the FP to access fixed-sized stack objects when
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// in between the FP and the non-SVE locals/spills.
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// there are scalable (SVE) objects in between the FP and the fixed-sized
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// objects.
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PreferFP &= !SVEStackSize;
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PreferFP &= !SVEStackSize;
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// Note: Keeping the following as multiple 'if' statements rather than
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// Note: Keeping the following as multiple 'if' statements rather than
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@ -2034,7 +2035,7 @@ StackOffset AArch64FrameLowering::resolveFrameOffsetReference(
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// offsets is smaller than for positive ones. If an offset is available
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// offsets is smaller than for positive ones. If an offset is available
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// via the FP and the SP, use whichever is closest.
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// via the FP and the SP, use whichever is closest.
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bool FPOffsetFits = !ForSimm || FPOffset >= -256;
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bool FPOffsetFits = !ForSimm || FPOffset >= -256;
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PreferFP |= Offset > -FPOffset;
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PreferFP |= Offset > -FPOffset && !SVEStackSize;
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if (MFI.hasVarSizedObjects()) {
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if (MFI.hasVarSizedObjects()) {
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// If we have variable sized objects, we can use either FP or BP, as the
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// If we have variable sized objects, we can use either FP or BP, as the
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@ -10,9 +10,7 @@
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; CHECK-NEXT: addvl sp, sp, #-32
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; CHECK-NEXT: addvl sp, sp, #-32
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; CHECK-NEXT: addvl sp, sp, #-28
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; CHECK-NEXT: addvl sp, sp, #-28
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; CHECK-NEXT: sub sp, sp, #2064
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; CHECK-NEXT: sub sp, sp, #2064
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; CHECK-NEXT: addvl x8, x29, #-32
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; CHECK-NEXT: ldr x8, [sp, #2048]
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; CHECK-NEXT: addvl x8, x8, #-28
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; CHECK-NEXT: ldur x8, [x8, #-16]
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; CHECK-NEXT: addvl sp, sp, #31
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; CHECK-NEXT: addvl sp, sp, #31
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; CHECK-NEXT: addvl sp, sp, #29
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; CHECK-NEXT: addvl sp, sp, #29
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; CHECK-NEXT: add sp, sp, #2064
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; CHECK-NEXT: add sp, sp, #2064
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@ -152,15 +152,15 @@ entry:
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; CHECK: sub sp, sp, #16, lsl #12
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; CHECK: sub sp, sp, #16, lsl #12
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; CHECK: sub sp, sp, #16
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; CHECK: sub sp, sp, #16
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; Stack guard is placed below the SVE stack area
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; Stack guard is placed below the SVE stack area (and above all fixed-width objects)
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; CHECK-DAG: add [[STACK_GUARD_SPILL_PART_LOC:x[0-9]+]], sp, #8, lsl #12
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; CHECK-DAG: add [[STACK_GUARD_SPILL_PART_LOC]], [[STACK_GUARD_SPILL_PART_LOC]], #16
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; CHECK-DAG: ldr [[STACK_GUARD:x[0-9]+]], [{{x[0-9]+}}, :lo12:__stack_chk_guard]
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; CHECK-DAG: ldr [[STACK_GUARD:x[0-9]+]], [{{x[0-9]+}}, :lo12:__stack_chk_guard]
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; CHECK-DAG: addvl [[STACK_GUARD_POS:x[0-9]+]], x29, #-2
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; CHECK-DAG: str [[STACK_GUARD]], [[[STACK_GUARD_SPILL_PART_LOC]], #32760]
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; CHECK-DAG: stur [[STACK_GUARD]], [[[STACK_GUARD_POS]], #-8]
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; char_arr is below the stack guard
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; char_arr is below the stack guard
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; CHECK-DAG: sub [[CHAR_ARR_1:x[0-9]+]], x29, #16
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; CHECK-DAG: add [[CHAR_ARR_LOC:x[0-9]+]], sp, #16, lsl #12
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; CHECK-DAG: addvl [[CHAR_ARR_2:x[0-9]+]], [[CHAR_ARR_1]], #-2
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; CHECK-DAG: strb wzr, [[[CHAR_ARR_LOC]]]
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; CHECK-DAG: strb wzr, [[[CHAR_ARR_2]]]
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; large1 is accessed via a virtual base register
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; large1 is accessed via a virtual base register
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; CHECK-DAG: add [[LARGE1:x[0-9]+]], sp, #8, lsl #12
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; CHECK-DAG: add [[LARGE1:x[0-9]+]], sp, #8, lsl #12
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@ -208,8 +208,9 @@ entry:
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; CHECK-DAG: str [[STACK_GUARD]], [[[STACK_GUARD_POS]]]
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; CHECK-DAG: str [[STACK_GUARD]], [[[STACK_GUARD_POS]]]
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; char_arr is below the SVE stack area
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; char_arr is below the SVE stack area
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; CHECK-DAG: addvl [[CHAR_ARR:x[0-9]+]], x29, #-3
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; CHECK-DAG: add [[CHAR_ARR:x[0-9]+]], sp, #15, lsl #12 // =61440
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; CHECK-DAG: sturb wzr, [[[CHAR_ARR]], #-8]
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; CHECK-DAG: add [[CHAR_ARR]], [[CHAR_ARR]], #9
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; CHECK-DAG: strb wzr, [[[CHAR_ARR]], #4095]
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; large1 is accessed via a virtual base register
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; large1 is accessed via a virtual base register
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; CHECK-DAG: add [[LARGE1:x[0-9]+]], sp, #8, lsl #12
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; CHECK-DAG: add [[LARGE1:x[0-9]+]], sp, #8, lsl #12
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