forked from OSchip/llvm-project
[X86][TBM] Use realistic BEXTR control bits
Avoid constant values that are guaranteed to give zero Found while investigating BEXTR optimizations for PR34042. llvm-svn: 333849
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@ -11,9 +11,9 @@ target triple = "x86_64-unknown-unknown"
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define i32 @stack_fold_bextri_u32(i32 %a0) {
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;CHECK-LABEL: stack_fold_bextri_u32
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;CHECK: # %bb.0:
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;CHECK: bextrl $2814, {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload
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;CHECK: bextrl $3841, {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %a0, i32 2814)
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%2 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %a0, i32 3841)
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ret i32 %2
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}
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declare i32 @llvm.x86.tbm.bextri.u32(i32, i32)
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@ -21,9 +21,9 @@ declare i32 @llvm.x86.tbm.bextri.u32(i32, i32)
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define i64 @stack_fold_bextri_u64(i64 %a0) {
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;CHECK-LABEL: stack_fold_bextri_u64
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;CHECK: # %bb.0:
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;CHECK: bextrq $2814, {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 8-byte Folded Reload
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;CHECK: bextrq $3841, {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 8-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %a0, i64 2814)
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%2 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %a0, i64 3841)
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ret i64 %2
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}
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declare i64 @llvm.x86.tbm.bextri.u64(i64, i64)
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@ -6,9 +6,9 @@
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define i64 @test__bextri_u64(i64 %a0) {
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; X64-LABEL: test__bextri_u64:
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; X64: # %bb.0:
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; X64-NEXT: bextrq $1, %rdi, %rax
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; X64-NEXT: bextrq $3841, %rdi, %rax # imm = 0xF01
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; X64-NEXT: retq
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%1 = call i64 @llvm.x86.tbm.bextri.u64(i64 %a0, i64 1)
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%1 = call i64 @llvm.x86.tbm.bextri.u64(i64 %a0, i64 3841)
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ret i64 %1
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}
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@ -7,14 +7,14 @@
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define i32 @test__bextri_u32(i32 %a0) {
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; X32-LABEL: test__bextri_u32:
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; X32: # %bb.0:
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; X32-NEXT: bextrl $1, {{[0-9]+}}(%esp), %eax
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; X32-NEXT: bextrl $3841, {{[0-9]+}}(%esp), %eax # imm = 0xF01
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; X32-NEXT: retl
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;
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; X64-LABEL: test__bextri_u32:
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; X64: # %bb.0:
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; X64-NEXT: bextrl $1, %edi, %eax
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; X64-NEXT: bextrl $3841, %edi, %eax # imm = 0xF01
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; X64-NEXT: retq
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%1 = call i32 @llvm.x86.tbm.bextri.u32(i32 %a0, i32 1)
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%1 = call i32 @llvm.x86.tbm.bextri.u32(i32 %a0, i32 3841)
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ret i32 %1
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}
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@ -4,10 +4,10 @@
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define i64 @test_x86_tbm_bextri_u64(i64 %a) nounwind readnone {
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; CHECK-LABEL: test_x86_tbm_bextri_u64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bextrq $2814, %rdi, %rax # imm = 0xAFE
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; CHECK-NEXT: bextrq $3841, %rdi, %rax # imm = 0xF01
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; CHECK-NEXT: retq
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entry:
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%0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %a, i64 2814)
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%0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %a, i64 3841)
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ret i64 %0
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}
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@ -16,22 +16,22 @@ declare i64 @llvm.x86.tbm.bextri.u64(i64, i64) nounwind readnone
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define i64 @test_x86_tbm_bextri_u64_m(i64* nocapture %a) nounwind readonly {
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; CHECK-LABEL: test_x86_tbm_bextri_u64_m:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bextrq $2814, (%rdi), %rax # imm = 0xAFE
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; CHECK-NEXT: bextrq $3841, (%rdi), %rax # imm = 0xF01
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; CHECK-NEXT: retq
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entry:
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%tmp1 = load i64, i64* %a, align 8
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%0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %tmp1, i64 2814)
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%0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %tmp1, i64 3841)
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ret i64 %0
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}
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define i64 @test_x86_tbm_bextri_u64_z(i64 %a, i64 %b) nounwind readnone {
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; CHECK-LABEL: test_x86_tbm_bextri_u64_z:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bextrq $2814, %rdi, %rax # imm = 0xAFE
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; CHECK-NEXT: bextrq $3841, %rdi, %rax # imm = 0xF01
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; CHECK-NEXT: cmoveq %rsi, %rax
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; CHECK-NEXT: retq
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entry:
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%0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %a, i64 2814)
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%0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %a, i64 3841)
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%1 = icmp eq i64 %0, 0
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%2 = select i1 %1, i64 %b, i64 %0
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ret i64 %2
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@ -7,17 +7,17 @@ define i32 @test_x86_tbm_bextri_u32(i32 %a) nounwind readnone {
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: addl %eax, %eax
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; X86-NEXT: bextrl $2814, %eax, %eax # imm = 0xAFE
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; X86-NEXT: bextrl $3841, %eax, %eax # imm = 0xF01
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; X86-NEXT: retl
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;
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; X64-LABEL: test_x86_tbm_bextri_u32:
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; X64: # %bb.0: # %entry
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; X64-NEXT: addl %edi, %edi
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; X64-NEXT: bextrl $2814, %edi, %eax # imm = 0xAFE
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; X64-NEXT: bextrl $3841, %edi, %eax # imm = 0xF01
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; X64-NEXT: retq
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entry:
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%0 = add i32 %a, %a
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%1 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %0, i32 2814)
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%1 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %0, i32 3841)
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ret i32 %1
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}
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@ -27,23 +27,23 @@ define i32 @test_x86_tbm_bextri_u32_m(i32* nocapture %a) nounwind readonly {
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; X86-LABEL: test_x86_tbm_bextri_u32_m:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: bextrl $2814, (%eax), %eax # imm = 0xAFE
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; X86-NEXT: bextrl $3841, (%eax), %eax # imm = 0xF01
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; X86-NEXT: retl
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;
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; X64-LABEL: test_x86_tbm_bextri_u32_m:
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; X64: # %bb.0: # %entry
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; X64-NEXT: bextrl $2814, (%rdi), %eax # imm = 0xAFE
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; X64-NEXT: bextrl $3841, (%rdi), %eax # imm = 0xF01
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; X64-NEXT: retq
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entry:
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%tmp1 = load i32, i32* %a, align 4
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%0 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %tmp1, i32 2814)
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%0 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %tmp1, i32 3841)
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ret i32 %0
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}
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define i32 @test_x86_tbm_bextri_u32_z(i32 %a, i32 %b) nounwind readonly {
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; X86-LABEL: test_x86_tbm_bextri_u32_z:
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; X86: # %bb.0: # %entry
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; X86-NEXT: bextrl $2814, {{[0-9]+}}(%esp), %eax # imm = 0xAFE
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; X86-NEXT: bextrl $3841, {{[0-9]+}}(%esp), %eax # imm = 0xF01
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; X86-NEXT: jne .LBB2_2
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; X86-NEXT: # %bb.1: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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@ -52,11 +52,11 @@ define i32 @test_x86_tbm_bextri_u32_z(i32 %a, i32 %b) nounwind readonly {
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;
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; X64-LABEL: test_x86_tbm_bextri_u32_z:
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; X64: # %bb.0: # %entry
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; X64-NEXT: bextrl $2814, %edi, %eax # imm = 0xAFE
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; X64-NEXT: bextrl $3841, %edi, %eax # imm = 0xF01
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; X64-NEXT: cmovel %esi, %eax
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; X64-NEXT: retq
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entry:
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%0 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %a, i32 2814)
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%0 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %a, i32 3841)
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%1 = icmp eq i32 %0, 0
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%2 = select i1 %1, i32 %b, i32 %0
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ret i32 %2
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