forked from OSchip/llvm-project
[PowerPC] Fix emitting instruction pairs on LE
My patch r204634 to emit instructions in little-endian format failed to handle those special cases where we emit a pair of instructions from a single LLVM MC instructions (like the bl; nop pairs used to implement the call sequence). In those cases, we still need to emit the "first" instruction (the one in the more significant word) first, on both big and little endian, and not swap them. llvm-svn: 211171
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@ -102,17 +102,45 @@ public:
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// Output the constant in big/little endian byte order.
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unsigned Size = Desc.getSize();
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if (IsLittleEndian) {
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for (unsigned i = 0; i != Size; ++i) {
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OS << (char)Bits;
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Bits >>= 8;
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switch (Size) {
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case 4:
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if (IsLittleEndian) {
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OS << (char)(Bits);
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OS << (char)(Bits >> 8);
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OS << (char)(Bits >> 16);
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OS << (char)(Bits >> 24);
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} else {
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OS << (char)(Bits >> 24);
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OS << (char)(Bits >> 16);
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OS << (char)(Bits >> 8);
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OS << (char)(Bits);
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}
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} else {
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int ShiftValue = (Size * 8) - 8;
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for (unsigned i = 0; i != Size; ++i) {
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OS << (char)(Bits >> ShiftValue);
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Bits <<= 8;
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break;
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case 8:
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// If we emit a pair of instructions, the first one is
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// always in the top 32 bits, even on little-endian.
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if (IsLittleEndian) {
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OS << (char)(Bits >> 32);
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OS << (char)(Bits >> 40);
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OS << (char)(Bits >> 48);
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OS << (char)(Bits >> 56);
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OS << (char)(Bits);
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OS << (char)(Bits >> 8);
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OS << (char)(Bits >> 16);
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OS << (char)(Bits >> 24);
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} else {
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OS << (char)(Bits >> 56);
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OS << (char)(Bits >> 48);
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OS << (char)(Bits >> 40);
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OS << (char)(Bits >> 32);
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OS << (char)(Bits >> 24);
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OS << (char)(Bits >> 16);
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OS << (char)(Bits >> 8);
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OS << (char)(Bits);
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}
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break;
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default:
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llvm_unreachable ("Invalid instruction size");
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}
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++MCNumEmitted; // Keep track of the # of mi's emitted.
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