forked from OSchip/llvm-project
[x86] Fix the test case added in r214670 and tweaked in r214674 further.
Fundamentally, there isn't a really portable way to test the constant pool contents. Instead, pin this test to the bare-metal triple. This also makes it a 64-bit triple which allows us to only match a single constant pool rather than two. It can also just hard code the '.' prefix as the format should be stable now that it has a fixed triple. Finally, I've switched it to use CHECK-NEXT to be more precise in the instruction sequence expected and to use variables rather than hard coding decisions by the register allocator. llvm-svn: 214679
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@ -1,4 +1,4 @@
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; RUN: llc < %s -march=x86 -mattr=+avx | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx | FileCheck %s
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define <2 x double> @fabs_v2f64(<2 x double> %p)
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@ -39,18 +39,16 @@ declare <8 x float> @llvm.fabs.v8f32(<8 x float> %p)
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; PR20354: when generating code for a vector fabs op,
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; make sure the correct mask is used for all vector elements.
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; CHECK-LABEL: LCPI4_0
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; CHECK: .long 2147483648
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; CHECK: .long 2147483648
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; CHECK-LABEL: LCPI4_1
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; CHECK: .long 2147483647
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; CHECK: .long 2147483647
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; CHECK-LABEL: fabs_v2f32_1
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; CHECK: vmovdqa {{.*}}LCPI4_0, %xmm0
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; CHECK: vpand {{.*}}LCPI4_1, %xmm0, %xmm0
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; CHECK: vmovd %xmm0, %eax
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; CHECK: vpextrd $1, %xmm0, %edx
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define i64 @fabs_v2f32_1() {
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; CHECK-LABEL: .LCPI4_0:
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; CHECK-NEXT: .long 2147483647
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; CHECK-NEXT: .long 2147483647
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define i64 @fabs_v2f32(<2 x float> %v) {
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; CHECK-LABEL: fabs_v2f32:
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; CHECK: movabsq $-9223372034707292160, %[[R:r[^ ]+]]
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; CHECK-NEXT: vmovq %[[R]], %[[X:xmm[0-9]+]]
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; CHECK-NEXT: vandps {{.*}}.LCPI4_0{{.*}}, %[[X]], %[[X]]
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; CHECK-NEXT: vmovq %[[X]], %rax
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; CHECK-NEXT: retq
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%highbits = bitcast i64 9223372039002259456 to <2 x float> ; 0x8000_0000_8000_0000
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%fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %highbits)
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%ret = bitcast <2 x float> %fabs to i64
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