forked from OSchip/llvm-project
[ValueTracking][InstCombine] Use m_Shr instead m_CombineOr(m_LShr, m_AShr). NFC
llvm-svn: 306205
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@ -686,8 +686,7 @@ static void computeKnownBitsFromAssume(const Value *V, KnownBits &Known,
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Known.One |= RHSKnown.Zero;
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// assume(v >> c = a)
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} else if (match(Arg,
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m_c_ICmp(Pred, m_CombineOr(m_LShr(m_V, m_ConstantInt(C)),
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m_AShr(m_V, m_ConstantInt(C))),
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m_c_ICmp(Pred, m_Shr(m_V, m_ConstantInt(C)),
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m_Value(A))) &&
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Pred == ICmpInst::ICMP_EQ &&
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isValidAssumeForContext(I, Q.CxtI, Q.DT)) {
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@ -698,9 +697,7 @@ static void computeKnownBitsFromAssume(const Value *V, KnownBits &Known,
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Known.Zero |= RHSKnown.Zero << C->getZExtValue();
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Known.One |= RHSKnown.One << C->getZExtValue();
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// assume(~(v >> c) = a)
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} else if (match(Arg, m_c_ICmp(Pred, m_Not(m_CombineOr(
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m_LShr(m_V, m_ConstantInt(C)),
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m_AShr(m_V, m_ConstantInt(C)))),
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} else if (match(Arg, m_c_ICmp(Pred, m_Not(m_Shr(m_V, m_ConstantInt(C))),
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m_Value(A))) &&
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Pred == ICmpInst::ICMP_EQ &&
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isValidAssumeForContext(I, Q.CxtI, Q.DT)) {
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@ -556,8 +556,7 @@ Instruction *InstCombiner::visitShl(BinaryOperator &I) {
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// The inexact versions are deferred to DAGCombine, so we don't hide shl
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// behind a bit mask.
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const APInt *ShOp1;
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if (match(Op0, m_CombineOr(m_Exact(m_LShr(m_Value(X), m_APInt(ShOp1))),
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m_Exact(m_AShr(m_Value(X), m_APInt(ShOp1)))))) {
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if (match(Op0, m_Exact(m_Shr(m_Value(X), m_APInt(ShOp1))))) {
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unsigned ShrAmt = ShOp1->getZExtValue();
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if (ShrAmt < ShAmt) {
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// If C1 < C2: (X >>?,exact C1) << C2 --> X << (C2 - C1)
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