forked from OSchip/llvm-project
[AMDGPU] Use MachineInstrBuilder::addReg. NFC.
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@ -5199,8 +5199,7 @@ void SIInstrInfo::legalizeGenericOperand(MachineBasicBlock &InsertMBB,
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return;
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Register DstReg = MRI.createVirtualRegister(DstRC);
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MachineInstr *Copy =
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BuildMI(InsertMBB, I, DL, get(AMDGPU::COPY), DstReg).add(Op);
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auto Copy = BuildMI(InsertMBB, I, DL, get(AMDGPU::COPY), DstReg).add(Op);
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Op.setReg(DstReg);
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Op.setSubReg(0);
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@ -5222,7 +5221,7 @@ void SIInstrInfo::legalizeGenericOperand(MachineBasicBlock &InsertMBB,
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}
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if (!RI.isSGPRClass(DstRC) && !Copy->readsRegister(AMDGPU::EXEC, &RI) &&
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!ImpDef)
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Copy->addOperand(MachineOperand::CreateReg(AMDGPU::EXEC, false, true));
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Copy.addReg(AMDGPU::EXEC, RegState::Implicit);
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}
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// Emit the actual waterfall loop, executing the wrapped instruction for each
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