forked from OSchip/llvm-project
Reduce usage of isRelRelative.
It is now used only for relocations that only set the low bits inside a page. Everything else is handled by getRelExpr. I will send a another review renaming and better documenting isRelRelative. llvm-svn: 267705
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e0ee7c608a
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7ac9628648
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@ -91,7 +91,6 @@ public:
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void writePltZero(uint8_t *Buf) const override;
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void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
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int32_t Index, unsigned RelOff) const override;
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bool isRelRelative(uint32_t Type) const override;
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void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
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void relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
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@ -115,7 +114,6 @@ public:
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void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
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int32_t Index, unsigned RelOff) const override;
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void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
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bool isRelRelative(uint32_t Type) const override;
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void relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
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void relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
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@ -127,7 +125,6 @@ class PPCTargetInfo final : public TargetInfo {
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public:
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PPCTargetInfo();
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void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
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bool isRelRelative(uint32_t Type) const override;
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RelExpr getRelExpr(uint32_t Type, const SymbolBody &S) const override;
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};
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@ -138,7 +135,6 @@ public:
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void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
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int32_t Index, unsigned RelOff) const override;
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void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
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bool isRelRelative(uint32_t Type) const override;
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};
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class AArch64TargetInfo final : public TargetInfo {
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@ -225,7 +221,7 @@ uint64_t TargetInfo::getImplicitAddend(const uint8_t *Buf,
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uint64_t TargetInfo::getVAStart() const { return Config->Pic ? 0 : VAStart; }
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bool TargetInfo::isHintRel(uint32_t Type) const { return false; }
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bool TargetInfo::isRelRelative(uint32_t Type) const { return true; }
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bool TargetInfo::isRelRelative(uint32_t Type) const { return false; }
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bool TargetInfo::needsThunk(uint32_t Type, const InputFile &File,
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const SymbolBody &S) const {
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@ -303,17 +299,6 @@ RelExpr X86TargetInfo::getRelExpr(uint32_t Type, const SymbolBody &S) const {
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}
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}
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bool X86TargetInfo::isRelRelative(uint32_t Type) const {
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switch (Type) {
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default:
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return false;
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case R_386_PC32:
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case R_386_PLT32:
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case R_386_TLS_LDO_32:
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return true;
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}
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}
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void X86TargetInfo::writeGotPltHeader(uint8_t *Buf) const {
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write32le(Buf, Out<ELF32LE>::Dynamic->getVA());
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}
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@ -617,23 +602,6 @@ bool X86_64TargetInfo::isTlsLocalDynamicRel(uint32_t Type) const {
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Type == R_X86_64_TLSLD;
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}
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bool X86_64TargetInfo::isRelRelative(uint32_t Type) const {
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switch (Type) {
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default:
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return false;
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case R_X86_64_DTPOFF32:
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case R_X86_64_DTPOFF64:
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case R_X86_64_GOTTPOFF:
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case R_X86_64_PC8:
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case R_X86_64_PC16:
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case R_X86_64_PC32:
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case R_X86_64_PC64:
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case R_X86_64_PLT32:
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case R_X86_64_TPOFF32:
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return true;
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}
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}
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void X86_64TargetInfo::relaxTlsGdToLe(uint8_t *Loc, uint32_t Type,
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uint64_t Val) const {
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// Convert
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@ -782,7 +750,6 @@ static uint16_t applyPPCHighest(uint64_t V) { return V >> 48; }
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static uint16_t applyPPCHighesta(uint64_t V) { return (V + 0x8000) >> 48; }
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PPCTargetInfo::PPCTargetInfo() {}
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bool PPCTargetInfo::isRelRelative(uint32_t Type) const { return false; }
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void PPCTargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
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uint64_t Val) const {
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@ -877,16 +844,6 @@ void PPC64TargetInfo::writePlt(uint8_t *Buf, uint64_t GotEntryAddr,
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write32be(Buf + 28, 0x4e800420); // bctr
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}
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bool PPC64TargetInfo::isRelRelative(uint32_t Type) const {
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switch (Type) {
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default:
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return true;
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case R_PPC64_ADDR64:
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case R_PPC64_TOC:
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return false;
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}
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}
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void PPC64TargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
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uint64_t Val) const {
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uint64_t TO = PPC64TocOffset;
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@ -1026,24 +983,11 @@ bool AArch64TargetInfo::isRelRelative(uint32_t Type) const {
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default:
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return false;
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case R_AARCH64_ADD_ABS_LO12_NC:
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case R_AARCH64_ADR_GOT_PAGE:
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case R_AARCH64_ADR_PREL_LO21:
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case R_AARCH64_ADR_PREL_PG_HI21:
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case R_AARCH64_CALL26:
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case R_AARCH64_CONDBR19:
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case R_AARCH64_JUMP26:
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case R_AARCH64_LDST8_ABS_LO12_NC:
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case R_AARCH64_LDST16_ABS_LO12_NC:
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case R_AARCH64_LDST32_ABS_LO12_NC:
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case R_AARCH64_LDST64_ABS_LO12_NC:
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case R_AARCH64_LDST128_ABS_LO12_NC:
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case R_AARCH64_PREL32:
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case R_AARCH64_PREL64:
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case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
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case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
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case R_AARCH64_TLSLE_ADD_TPREL_HI12:
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case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
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case R_AARCH64_TSTBR14:
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case R_AARCH64_LD64_GOT_LO12_NC:
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return true;
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}
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@ -1593,15 +1537,7 @@ bool MipsTargetInfo<ELFT>::isHintRel(uint32_t Type) const {
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template <class ELFT>
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bool MipsTargetInfo<ELFT>::isRelRelative(uint32_t Type) const {
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switch (Type) {
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default:
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return true;
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case R_MIPS_26:
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case R_MIPS_32:
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case R_MIPS_64:
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case R_MIPS_HI16:
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return false;
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}
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return Type == R_MIPS_LO16;
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}
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}
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}
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@ -493,6 +493,24 @@ static bool needsCopyRel(RelExpr E, const SymbolBody &S) {
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return true;
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}
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template <class ELFT>
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static bool isRelRelative(RelExpr E, uint32_t Type, const SymbolBody &Body) {
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if (E == R_SIZE)
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return true;
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bool AbsVal = (isAbsolute<ELFT>(Body) || Body.isTls()) &&
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!refersToGotEntry(E) && !needsPlt(E);
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bool RelE = E == R_PC || E == R_PLT_PC || E == R_GOT_PC || E == R_GOTREL ||
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E == R_PAGE_PC;
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if (AbsVal && !RelE)
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return true;
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if (!AbsVal && RelE)
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return true;
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return Target->isRelRelative(Type);
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}
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// The reason we have to do this early scan is as follows
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// * To mmap the output file, we need to know the size
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// * For that, we need to know how many dynamic relocs we will have.
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@ -562,7 +580,8 @@ void Writer<ELFT>::scanRelocs(InputSectionBase<ELFT> &C, ArrayRef<RelTy> Rels) {
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continue;
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}
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if (Expr == R_GOT && !Target->isRelRelative(Type) && Config->Shared)
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if (Expr == R_GOT && !isRelRelative<ELFT>(Expr, Type, Body) &&
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Config->Shared)
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AddDyn({Target->RelativeRel, C.OutSec, Offset, true, &Body,
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getAddend<ELFT>(RI)});
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@ -698,8 +717,7 @@ void Writer<ELFT>::scanRelocs(InputSectionBase<ELFT> &C, ArrayRef<RelTy> Rels) {
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// We can however do better than just copying the incoming relocation. We
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// can process some of it and and just ask the dynamic linker to add the
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// load address.
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if (!Config->Pic || Target->isRelRelative(Type) || Expr == R_PC ||
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Expr == R_SIZE || isAbsolute<ELFT>(Body)) {
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if (!Config->Pic || isRelRelative<ELFT>(Expr, Type, Body)) {
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if (Config->EMachine == EM_MIPS && Body.isLocal() &&
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(Type == R_MIPS_GPREL16 || Type == R_MIPS_GPREL32))
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Addend += File.getMipsGp0();
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