forked from OSchip/llvm-project
[InstCombine] add tests for inverted select-shuffles + binop (PR41304); NFC
llvm-svn: 357368
This commit is contained in:
parent
e1bc360fc6
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7ac1186b58
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; Non-canonical mask
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define <4 x i32> @and(<4 x i32> %x, <4 x i32> %y) {
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; CHECK-LABEL: @and(
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; CHECK-NEXT: [[SEL1:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]], <4 x i32> <i32 0, i32 5, i32 6, i32 3>
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; CHECK-NEXT: [[SEL2:%.*]] = shufflevector <4 x i32> [[Y]], <4 x i32> [[X]], <4 x i32> <i32 0, i32 5, i32 6, i32 3>
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; CHECK-NEXT: [[R:%.*]] = and <4 x i32> [[SEL1]], [[SEL2]]
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; CHECK-NEXT: ret <4 x i32> [[R]]
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;
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%sel1 = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 0, i32 5, i32 6, i32 3>
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%sel2 = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 4, i32 1, i32 2, i32 7>
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%r = and <4 x i32> %sel1, %sel2
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ret <4 x i32> %r
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}
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define <4 x i32> @or(<4 x i32> %x, <4 x i32> %y) {
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; CHECK-LABEL: @or(
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; CHECK-NEXT: [[SEL1:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]], <4 x i32> <i32 0, i32 5, i32 6, i32 3>
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; CHECK-NEXT: [[SEL2:%.*]] = shufflevector <4 x i32> [[Y]], <4 x i32> [[X]], <4 x i32> <i32 0, i32 5, i32 6, i32 3>
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; CHECK-NEXT: [[R:%.*]] = or <4 x i32> [[SEL1]], [[SEL2]]
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; CHECK-NEXT: ret <4 x i32> [[R]]
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;
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%sel1 = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 0, i32 5, i32 6, i32 3>
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%sel2 = shufflevector <4 x i32> %y, <4 x i32> %x, <4 x i32> <i32 0, i32 5, i32 6, i32 3>
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%r = or <4 x i32> %sel1, %sel2
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ret <4 x i32> %r
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}
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; Non-canonical masks
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define <4 x i32> @xor(<4 x i32> %x, <4 x i32> %y) {
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; CHECK-LABEL: @xor(
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; CHECK-NEXT: [[SEL1:%.*]] = shufflevector <4 x i32> [[Y:%.*]], <4 x i32> [[X:%.*]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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; CHECK-NEXT: [[SEL2:%.*]] = shufflevector <4 x i32> [[X]], <4 x i32> [[Y]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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; CHECK-NEXT: [[R:%.*]] = xor <4 x i32> [[SEL1]], [[SEL2]]
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; CHECK-NEXT: ret <4 x i32> [[R]]
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;
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%sel1 = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%sel2 = shufflevector <4 x i32> %y, <4 x i32> %x, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%r = xor <4 x i32> %sel1, %sel2
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ret <4 x i32> %r
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}
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; Flags
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define <4 x i32> @add(<4 x i32> %x, <4 x i32> %y) {
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; CHECK-LABEL: @add(
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; CHECK-NEXT: [[SEL1:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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; CHECK-NEXT: [[SEL2:%.*]] = shufflevector <4 x i32> [[Y]], <4 x i32> [[X]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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; CHECK-NEXT: [[R:%.*]] = add nsw <4 x i32> [[SEL1]], [[SEL2]]
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; CHECK-NEXT: ret <4 x i32> [[R]]
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;
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%sel1 = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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%sel2 = shufflevector <4 x i32> %y, <4 x i32> %x, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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%r = add nsw <4 x i32> %sel1, %sel2
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ret <4 x i32> %r
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}
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; Non-commutative opcode
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define <4 x i32> @sub(<4 x i32> %x, <4 x i32> %y) {
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; CHECK-LABEL: @sub(
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; CHECK-NEXT: [[SEL1:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]], <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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; CHECK-NEXT: [[SEL2:%.*]] = shufflevector <4 x i32> [[Y]], <4 x i32> [[X]], <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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; CHECK-NEXT: [[R:%.*]] = sub <4 x i32> [[SEL1]], [[SEL2]]
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; CHECK-NEXT: ret <4 x i32> [[R]]
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;
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%sel1 = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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%sel2 = shufflevector <4 x i32> %y, <4 x i32> %x, <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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%r = sub <4 x i32> %sel1, %sel2
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ret <4 x i32> %r
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}
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define <4 x i32> @mul(<4 x i32> %x, <4 x i32> %y) {
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; CHECK-LABEL: @mul(
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; CHECK-NEXT: [[SEL1:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]], <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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; CHECK-NEXT: [[SEL2:%.*]] = shufflevector <4 x i32> [[Y]], <4 x i32> [[X]], <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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; CHECK-NEXT: [[R:%.*]] = mul nuw <4 x i32> [[SEL1]], [[SEL2]]
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; CHECK-NEXT: ret <4 x i32> [[R]]
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;
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%sel1 = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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%sel2 = shufflevector <4 x i32> %y, <4 x i32> %x, <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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%r = mul nuw <4 x i32> %sel1, %sel2
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ret <4 x i32> %r
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}
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define <4 x i32> @sdiv(<4 x i32> %x, <4 x i32> %y) {
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; CHECK-LABEL: @sdiv(
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; CHECK-NEXT: [[SEL1:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]], <4 x i32> <i32 0, i32 1, i32 6, i32 7>
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; CHECK-NEXT: [[SEL2:%.*]] = shufflevector <4 x i32> [[Y]], <4 x i32> [[X]], <4 x i32> <i32 0, i32 1, i32 6, i32 7>
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; CHECK-NEXT: [[R:%.*]] = sdiv <4 x i32> [[SEL1]], [[SEL2]]
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; CHECK-NEXT: ret <4 x i32> [[R]]
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;
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%sel1 = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
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%sel2 = shufflevector <4 x i32> %y, <4 x i32> %x, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
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%r = sdiv <4 x i32> %sel1, %sel2
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ret <4 x i32> %r
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}
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define <4 x i32> @udiv(<4 x i32> %x, <4 x i32> %y) {
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; CHECK-LABEL: @udiv(
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; CHECK-NEXT: [[SEL1:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]], <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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; CHECK-NEXT: [[SEL2:%.*]] = shufflevector <4 x i32> [[Y]], <4 x i32> [[X]], <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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; CHECK-NEXT: [[R:%.*]] = udiv <4 x i32> [[SEL1]], [[SEL2]]
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; CHECK-NEXT: ret <4 x i32> [[R]]
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;
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%sel1 = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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%sel2 = shufflevector <4 x i32> %y, <4 x i32> %x, <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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%r = udiv <4 x i32> %sel1, %sel2
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ret <4 x i32> %r
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}
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define <4 x i32> @srem(<4 x i32> %x, <4 x i32> %y) {
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; CHECK-LABEL: @srem(
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; CHECK-NEXT: [[SEL1:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]], <4 x i32> <i32 0, i32 1, i32 6, i32 7>
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; CHECK-NEXT: [[SEL2:%.*]] = shufflevector <4 x i32> [[Y]], <4 x i32> [[X]], <4 x i32> <i32 0, i32 1, i32 6, i32 7>
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; CHECK-NEXT: [[R:%.*]] = srem <4 x i32> [[SEL1]], [[SEL2]]
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; CHECK-NEXT: ret <4 x i32> [[R]]
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;
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%sel1 = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
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%sel2 = shufflevector <4 x i32> %y, <4 x i32> %x, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
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%r = srem <4 x i32> %sel1, %sel2
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ret <4 x i32> %r
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}
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define <4 x i32> @urem(<4 x i32> %x, <4 x i32> %y) {
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; CHECK-LABEL: @urem(
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; CHECK-NEXT: [[SEL1:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]], <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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; CHECK-NEXT: [[SEL2:%.*]] = shufflevector <4 x i32> [[Y]], <4 x i32> [[X]], <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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; CHECK-NEXT: [[R:%.*]] = urem <4 x i32> [[SEL1]], [[SEL2]]
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; CHECK-NEXT: ret <4 x i32> [[R]]
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;
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%sel1 = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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%sel2 = shufflevector <4 x i32> %y, <4 x i32> %x, <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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%r = urem <4 x i32> %sel1, %sel2
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ret <4 x i32> %r
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}
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define <4 x i32> @shl(<4 x i32> %x, <4 x i32> %y) {
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; CHECK-LABEL: @shl(
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; CHECK-NEXT: [[SEL1:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]], <4 x i32> <i32 0, i32 1, i32 6, i32 7>
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; CHECK-NEXT: [[SEL2:%.*]] = shufflevector <4 x i32> [[Y]], <4 x i32> [[X]], <4 x i32> <i32 0, i32 1, i32 6, i32 7>
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; CHECK-NEXT: [[R:%.*]] = shl nsw <4 x i32> [[SEL1]], [[SEL2]]
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; CHECK-NEXT: ret <4 x i32> [[R]]
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;
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%sel1 = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
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%sel2 = shufflevector <4 x i32> %y, <4 x i32> %x, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
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%r = shl nsw <4 x i32> %sel1, %sel2
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ret <4 x i32> %r
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}
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define <4 x i32> @lshr(<4 x i32> %x, <4 x i32> %y) {
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; CHECK-LABEL: @lshr(
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; CHECK-NEXT: [[SEL1:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]], <4 x i32> <i32 0, i32 5, i32 6, i32 3>
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; CHECK-NEXT: [[SEL2:%.*]] = shufflevector <4 x i32> [[Y]], <4 x i32> [[X]], <4 x i32> <i32 0, i32 5, i32 6, i32 3>
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; CHECK-NEXT: [[R:%.*]] = lshr exact <4 x i32> [[SEL1]], [[SEL2]]
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; CHECK-NEXT: ret <4 x i32> [[R]]
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;
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%sel1 = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 0, i32 5, i32 6, i32 3>
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%sel2 = shufflevector <4 x i32> %y, <4 x i32> %x, <4 x i32> <i32 0, i32 5, i32 6, i32 3>
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%r = lshr exact <4 x i32> %sel1, %sel2
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ret <4 x i32> %r
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}
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define <4 x i32> @ashr(<4 x i32> %x, <4 x i32> %y) {
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; CHECK-LABEL: @ashr(
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; CHECK-NEXT: [[SEL1:%.*]] = shufflevector <4 x i32> [[Y:%.*]], <4 x i32> [[X:%.*]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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; CHECK-NEXT: [[SEL2:%.*]] = shufflevector <4 x i32> [[X]], <4 x i32> [[Y]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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; CHECK-NEXT: [[R:%.*]] = ashr <4 x i32> [[SEL1]], [[SEL2]]
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; CHECK-NEXT: ret <4 x i32> [[R]]
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;
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%sel1 = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%sel2 = shufflevector <4 x i32> %y, <4 x i32> %x, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%r = ashr <4 x i32> %sel1, %sel2
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ret <4 x i32> %r
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}
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define <4 x float> @fadd(<4 x float> %x, <4 x float> %y) {
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; CHECK-LABEL: @fadd(
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; CHECK-NEXT: [[SEL1:%.*]] = shufflevector <4 x float> [[Y:%.*]], <4 x float> [[X:%.*]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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; CHECK-NEXT: [[SEL2:%.*]] = shufflevector <4 x float> [[X]], <4 x float> [[Y]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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; CHECK-NEXT: [[R:%.*]] = fadd <4 x float> [[SEL1]], [[SEL2]]
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; CHECK-NEXT: ret <4 x float> [[R]]
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;
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%sel1 = shufflevector <4 x float> %x, <4 x float> %y, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%sel2 = shufflevector <4 x float> %y, <4 x float> %x, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%r = fadd <4 x float> %sel1, %sel2
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ret <4 x float> %r
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}
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define <4 x float> @fsub(<4 x float> %x, <4 x float> %y) {
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; CHECK-LABEL: @fsub(
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; CHECK-NEXT: [[SEL1:%.*]] = shufflevector <4 x float> [[Y:%.*]], <4 x float> [[X:%.*]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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; CHECK-NEXT: [[SEL2:%.*]] = shufflevector <4 x float> [[X]], <4 x float> [[Y]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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; CHECK-NEXT: [[R:%.*]] = fsub fast <4 x float> [[SEL1]], [[SEL2]]
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; CHECK-NEXT: ret <4 x float> [[R]]
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;
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%sel1 = shufflevector <4 x float> %x, <4 x float> %y, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%sel2 = shufflevector <4 x float> %y, <4 x float> %x, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%r = fsub fast <4 x float> %sel1, %sel2
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ret <4 x float> %r
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}
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define <4 x double> @fmul(<4 x double> %x, <4 x double> %y) {
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; CHECK-LABEL: @fmul(
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; CHECK-NEXT: [[SEL1:%.*]] = shufflevector <4 x double> [[Y:%.*]], <4 x double> [[X:%.*]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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; CHECK-NEXT: [[SEL2:%.*]] = shufflevector <4 x double> [[X]], <4 x double> [[Y]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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; CHECK-NEXT: [[R:%.*]] = fmul nnan <4 x double> [[SEL1]], [[SEL2]]
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; CHECK-NEXT: ret <4 x double> [[R]]
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;
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%sel1 = shufflevector <4 x double> %x, <4 x double> %y, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%sel2 = shufflevector <4 x double> %y, <4 x double> %x, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%r = fmul nnan <4 x double> %sel1, %sel2
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ret <4 x double> %r
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}
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define <4 x double> @fdiv(<4 x double> %x, <4 x double> %y) {
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; CHECK-LABEL: @fdiv(
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; CHECK-NEXT: [[SEL1:%.*]] = shufflevector <4 x double> [[Y:%.*]], <4 x double> [[X:%.*]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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; CHECK-NEXT: [[SEL2:%.*]] = shufflevector <4 x double> [[X]], <4 x double> [[Y]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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; CHECK-NEXT: [[R:%.*]] = fdiv nnan arcp <4 x double> [[SEL1]], [[SEL2]]
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; CHECK-NEXT: ret <4 x double> [[R]]
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;
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%sel1 = shufflevector <4 x double> %x, <4 x double> %y, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%sel2 = shufflevector <4 x double> %y, <4 x double> %x, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%r = fdiv arcp nnan <4 x double> %sel1, %sel2
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ret <4 x double> %r
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}
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define <4 x double> @frem(<4 x double> %x, <4 x double> %y) {
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; CHECK-LABEL: @frem(
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; CHECK-NEXT: [[SEL1:%.*]] = shufflevector <4 x double> [[Y:%.*]], <4 x double> [[X:%.*]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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; CHECK-NEXT: [[SEL2:%.*]] = shufflevector <4 x double> [[X]], <4 x double> [[Y]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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; CHECK-NEXT: [[R:%.*]] = frem <4 x double> [[SEL1]], [[SEL2]]
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; CHECK-NEXT: ret <4 x double> [[R]]
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;
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%sel1 = shufflevector <4 x double> %x, <4 x double> %y, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%sel2 = shufflevector <4 x double> %y, <4 x double> %x, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%r = frem <4 x double> %sel1, %sel2
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ret <4 x double> %r
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}
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