forked from OSchip/llvm-project
[Hexagon] Recognize more copy-equivalents in RDF optimizations
llvm-svn: 258076
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@ -35,8 +35,8 @@ namespace llvm {
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}
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namespace {
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cl::opt<unsigned> RDFLimit("rdf-limit", cl::init(UINT_MAX));
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unsigned RDFCount = 0;
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cl::opt<unsigned> RDFLimit("rdf-limit", cl::init(UINT_MAX));
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cl::opt<bool> RDFDump("rdf-dump", cl::init(false));
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class HexagonRDFOpt : public MachineFunctionPass {
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@ -71,6 +71,12 @@ INITIALIZE_PASS_DEPENDENCY(MachineDominanceFrontier)
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INITIALIZE_PASS_END(HexagonRDFOpt, "rdfopt", "Hexagon RDF opt", false, false)
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struct HexagonCP : public CopyPropagation {
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HexagonCP(DataFlowGraph &G) : CopyPropagation(G) {}
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bool interpretAsCopy(const MachineInstr *MI, EqualityMap &EM) override;
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};
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struct HexagonDCE : public DeadCodeElimination {
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HexagonDCE(DataFlowGraph &G, MachineRegisterInfo &MRI)
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: DeadCodeElimination(G, MRI) {}
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@ -81,6 +87,43 @@ struct HexagonDCE : public DeadCodeElimination {
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};
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bool HexagonCP::interpretAsCopy(const MachineInstr *MI, EqualityMap &EM) {
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auto mapRegs = [MI,&EM] (RegisterRef DstR, RegisterRef SrcR) -> void {
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EM.insert(std::make_pair(DstR, SrcR));
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};
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unsigned Opc = MI->getOpcode();
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switch (Opc) {
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case Hexagon::A2_combinew: {
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const MachineOperand &DstOp = MI->getOperand(0);
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const MachineOperand &HiOp = MI->getOperand(1);
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const MachineOperand &LoOp = MI->getOperand(2);
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assert(DstOp.getSubReg() == 0 && "Unexpected subregister");
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mapRegs({ DstOp.getReg(), Hexagon::subreg_hireg },
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{ HiOp.getReg(), HiOp.getSubReg() });
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mapRegs({ DstOp.getReg(), Hexagon::subreg_loreg },
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{ LoOp.getReg(), LoOp.getSubReg() });
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return true;
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}
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case Hexagon::A2_addi: {
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const MachineOperand &A = MI->getOperand(2);
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if (!A.isImm() || A.getImm() != 0)
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return false;
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}
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// Fall through.
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case Hexagon::A2_tfr: {
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const MachineOperand &DstOp = MI->getOperand(0);
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const MachineOperand &SrcOp = MI->getOperand(1);
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mapRegs({ DstOp.getReg(), DstOp.getSubReg() },
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{ SrcOp.getReg(), SrcOp.getSubReg() });
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return true;
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}
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}
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return CopyPropagation::interpretAsCopy(MI, EM);
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}
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bool HexagonDCE::run() {
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bool Collected = collect();
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if (!Collected)
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@ -106,6 +149,7 @@ bool HexagonDCE::run() {
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}
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}
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// Nodes to remove.
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SetVector<NodeId> Remove = DeadInstrs;
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@ -227,31 +271,33 @@ bool HexagonRDFOpt::runOnMachineFunction(MachineFunction &MF) {
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const auto &HII = *MF.getSubtarget<HexagonSubtarget>().getInstrInfo();
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const auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo();
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MRI = &MF.getRegInfo();
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HexagonRegisterAliasInfo HAI(HRI);
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TargetOperandInfo TOI(HII);
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bool Changed;
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if (RDFDump)
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MF.print(dbgs() << "Before " << getPassName() << "\n", nullptr);
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HexagonRegisterAliasInfo HAI(HRI);
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TargetOperandInfo TOI(HII);
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DataFlowGraph G(MF, HII, HRI, *MDT, MDF, HAI, TOI);
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G.build();
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if (RDFDump) {
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dbgs() << PrintNode<FuncNode*>(G.getFunc(), G) << '\n';
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dbgs() << MF.getName() << '\n';
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}
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bool Changed;
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CopyPropagation CP(G);
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if (RDFDump)
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dbgs() << "Starting copy propagation on: " << MF.getName() << '\n'
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<< PrintNode<FuncNode*>(G.getFunc(), G) << '\n';
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HexagonCP CP(G);
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CP.trace(RDFDump);
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Changed = CP.run();
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if (Changed)
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G.build();
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if (RDFDump)
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dbgs() << "Starting dead code elimination on: " << MF.getName() << '\n'
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<< PrintNode<FuncNode*>(G.getFunc(), G) << '\n';
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HexagonDCE DCE(G, *MRI);
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DCE.trace(RDFDump);
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Changed |= DCE.run();
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if (Changed) {
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if (RDFDump)
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dbgs() << "Starting liveness recomputation on: " << MF.getName() << '\n';
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Liveness LV(*MRI, G);
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LV.trace(RDFDump);
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LV.computeLiveIns();
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@ -261,6 +307,7 @@ bool HexagonRDFOpt::runOnMachineFunction(MachineFunction &MF) {
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if (RDFDump)
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MF.print(dbgs() << "After " << getPassName() << "\n", nullptr);
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return false;
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}
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@ -268,5 +315,3 @@ bool HexagonRDFOpt::runOnMachineFunction(MachineFunction &MF) {
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FunctionPass *llvm::createHexagonRDFOpt() {
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return new HexagonRDFOpt();
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}
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