forked from OSchip/llvm-project
[AArch64] Update comment to reflect reality.
llvm-svn: 249007
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@ -1181,8 +1181,8 @@ bool AArch64LoadStoreOpt::optimizeBlock(MachineBasicBlock &MBB) {
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++NumPreFolded;
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++NumPreFolded;
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break;
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break;
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}
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}
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// The immediate in the load/store is scaled by the size of the register
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// The immediate in the load/store is scaled by the size of the memory
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// being loaded. The immediate in the add we're looking for,
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// operation. The immediate in the add we're looking for,
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// however, is not, so adjust here.
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// however, is not, so adjust here.
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int Value = getLdStOffsetOp(MI).getImm() * getMemScale(MI);
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int Value = getLdStOffsetOp(MI).getImm() * getMemScale(MI);
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