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[PowerPC] Fix the Predicates for enabling pcrelative-memops and PLXVP/PSTXVP definitions 

In this patch, Predicates fix added for the following:
* disable prefix-instrs will disable pcrelative-memops
* set two predicates PairedVectorMemops and PrefixInstrs for PLXVP/PSTXVP definitions

Differential Revision: https://reviews.llvm.org/D89727
Reviewed by: amyk, steven.zhang
This commit is contained in:
Victor Huang 2020-10-23 11:31:05 -05:00
parent 24a1fe7547
commit 7a74bb899a
3 changed files with 18 additions and 13 deletions
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2
llvm/lib/Target/PowerPC/PPC.td
View File

@ -236,7 +236,7 @@ def FeaturePrefixInstrs : SubtargetFeature<"prefix-instrs", "HasPrefixInstrs",
def FeaturePCRelativeMemops :
SubtargetFeature<"pcrelative-memops", "HasPCRelativeMemops", "true",
"Enable PC relative Memory Ops",
[FeatureISA3_0]>;
[FeatureISA3_0, FeaturePrefixInstrs]>;
def FeaturePairedVectorMemops:
SubtargetFeature<"paired-vector-memops", "PairedVectorMemops", "true",
"32Byte load and store instructions",

18
llvm/lib/Target/PowerPC/PPCInstrPrefix.td
View File

@ -1398,12 +1398,6 @@ let mayLoad = 1, mayStore = 0, Predicates = [PairedVectorMemops] in {
def LXVPX : XForm_XTp5_XAB5<31, 333, (outs vsrprc:$XTp), (ins memrr:$src),
"lxvpx $XTp, $src", IIC_LdStLFD,
[]>;
let Predicates = [PrefixInstrs] in {
defm PLXVP :
8LS_DForm_R_XTp5_SI34_MEM_p<1, 58, (outs vsrprc:$XTp), (ins memri34:$D_RA),
(ins memri34_pcrel:$D_RA), "plxvp $XTp, $D_RA",
IIC_LdStLFD>;
}
}
let mayLoad = 0, mayStore = 1, Predicates = [PairedVectorMemops] in {
@ -1413,13 +1407,21 @@ let mayLoad = 0, mayStore = 1, Predicates = [PairedVectorMemops] in {
def STXVPX : XForm_XTp5_XAB5<31, 461, (outs), (ins vsrprc:$XTp, memrr:$dst),
"stxvpx $XTp, $dst", IIC_LdStLFD,
[]>;
let Predicates = [PrefixInstrs] in {
}
let mayLoad = 1, mayStore = 0, Predicates = [PairedVectorMemops, PrefixInstrs] in {
defm PLXVP :
8LS_DForm_R_XTp5_SI34_MEM_p<1, 58, (outs vsrprc:$XTp), (ins memri34:$D_RA),
(ins memri34_pcrel:$D_RA), "plxvp $XTp, $D_RA",
IIC_LdStLFD>;
}
let mayLoad = 0, mayStore = 1, Predicates = [PairedVectorMemops, PrefixInstrs] in {
defm PSTXVP :
8LS_DForm_R_XTp5_SI34_MEM_p<1, 62, (outs), (ins vsrprc:$XTp, memri34:$D_RA),
(ins vsrprc:$XTp, memri34_pcrel:$D_RA),
"pstxvp $XTp, $D_RA", IIC_LdStLFD>;
}
}
// TODO: We have an added complexity of 500 here. This is only a temporary
// solution to have tablegen consider these patterns first. The way we do

3
llvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll
View File

@ -7,6 +7,9 @@
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
; RUN: -mattr=-pcrelative-memops -ppc-asm-full-reg-names -mcpu=pwr10 < %s | \
; RUN: FileCheck %s --check-prefix=CHECK-NOPCREL
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
; RUN: -mattr=-prefix-instrs -ppc-asm-full-reg-names -mcpu=pwr10 < %s | \
; RUN: FileCheck %s --check-prefix=CHECK-NOPCREL
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
; RUN: -ppc-asm-full-reg-names -target-abi=elfv2 -mcpu=pwr10 < %s | \
; RUN: FileCheck %s