[ARM] Some Thumb2ITBlock clean ups. NFC

Some more refactoring, like registering the IT Block pass, less cryptic
variable names, and some simplification of loops.

Differential Revision: https://reviews.llvm.org/D63419

llvm-svn: 363666
This commit is contained in:
Sjoerd Meijer 2019-06-18 12:13:11 +00:00
parent 5c64a8c4c6
commit 7a7009f7c8
2 changed files with 41 additions and 48 deletions

View File

@ -64,6 +64,7 @@ void initializeARMCodeGenPreparePass(PassRegistry &);
void initializeARMConstantIslandsPass(PassRegistry &);
void initializeARMExpandPseudoPass(PassRegistry &);
void initializeThumb2SizeReducePass(PassRegistry &);
void initializeThumb2ITBlockPass(PassRegistry &);
void initializeMVEVPTBlockPass(PassRegistry &);
} // end namespace llvm

View File

@ -31,13 +31,16 @@
using namespace llvm;
#define DEBUG_TYPE "thumb2-it"
#define PASS_NAME "Thumb IT blocks insertion pass"
STATISTIC(NumITs, "Number of IT blocks inserted");
STATISTIC(NumMovedInsts, "Number of predicated instructions moved");
using RegisterSet = SmallSet<unsigned, 4>;
namespace {
class Thumb2ITBlockPass : public MachineFunctionPass {
class Thumb2ITBlock : public MachineFunctionPass {
public:
static char ID;
@ -46,7 +49,7 @@ namespace {
const TargetRegisterInfo *TRI;
ARMFunctionInfo *AFI;
Thumb2ITBlockPass() : MachineFunctionPass(ID) {}
Thumb2ITBlock() : MachineFunctionPass(ID) {}
bool runOnMachineFunction(MachineFunction &Fn) override;
@ -56,33 +59,32 @@ namespace {
}
StringRef getPassName() const override {
return "Thumb IT blocks insertion pass";
return PASS_NAME;
}
private:
bool MoveCopyOutOfITBlock(MachineInstr *MI,
ARMCC::CondCodes CC, ARMCC::CondCodes OCC,
SmallSet<unsigned, 4> &Defs,
SmallSet<unsigned, 4> &Uses);
bool InsertITInstructions(MachineBasicBlock &MBB);
RegisterSet &Defs, RegisterSet &Uses);
bool InsertITInstructions(MachineBasicBlock &Block);
};
char Thumb2ITBlockPass::ID = 0;
char Thumb2ITBlock::ID = 0;
} // end anonymous namespace
INITIALIZE_PASS(Thumb2ITBlock, DEBUG_TYPE, PASS_NAME, false, false)
/// TrackDefUses - Tracking what registers are being defined and used by
/// instructions in the IT block. This also tracks "dependencies", i.e. uses
/// in the IT block that are defined before the IT instruction.
static void TrackDefUses(MachineInstr *MI,
SmallSet<unsigned, 4> &Defs,
SmallSet<unsigned, 4> &Uses,
static void TrackDefUses(MachineInstr *MI, RegisterSet &Defs, RegisterSet &Uses,
const TargetRegisterInfo *TRI) {
SmallVector<unsigned, 4> LocalDefs;
SmallVector<unsigned, 4> LocalUses;
using RegList = SmallVector<unsigned, 4>;
RegList LocalDefs;
RegList LocalUses;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
for (auto &MO : MI->operands()) {
if (!MO.isReg())
continue;
unsigned Reg = MO.getReg();
@ -94,27 +96,21 @@ static void TrackDefUses(MachineInstr *MI,
LocalDefs.push_back(Reg);
}
for (unsigned i = 0, e = LocalUses.size(); i != e; ++i) {
unsigned Reg = LocalUses[i];
for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true);
Subreg.isValid(); ++Subreg)
Uses.insert(*Subreg);
}
auto InsertUsesDefs = [&](RegList &Regs, RegisterSet &UsesDefs) {
for (unsigned Reg : Regs)
for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true);
Subreg.isValid(); ++Subreg)
UsesDefs.insert(*Subreg);
};
for (unsigned i = 0, e = LocalDefs.size(); i != e; ++i) {
unsigned Reg = LocalDefs[i];
for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true);
Subreg.isValid(); ++Subreg)
Defs.insert(*Subreg);
if (Reg == ARM::CPSR)
continue;
}
InsertUsesDefs(LocalDefs, Defs);
InsertUsesDefs(LocalUses, Uses);
}
/// Clear kill flags for any uses in the given set. This will likely
/// conservatively remove more kill flags than are necessary, but removing them
/// is safer than incorrect kill flags remaining on instructions.
static void ClearKillFlags(MachineInstr *MI, SmallSet<unsigned, 4> &Uses) {
static void ClearKillFlags(MachineInstr *MI, RegisterSet &Uses) {
for (MachineOperand &MO : MI->operands()) {
if (!MO.isReg() || MO.isDef() || !MO.isKill())
continue;
@ -137,10 +133,9 @@ static bool isCopy(MachineInstr *MI) {
}
bool
Thumb2ITBlockPass::MoveCopyOutOfITBlock(MachineInstr *MI,
ARMCC::CondCodes CC, ARMCC::CondCodes OCC,
SmallSet<unsigned, 4> &Defs,
SmallSet<unsigned, 4> &Uses) {
Thumb2ITBlock::MoveCopyOutOfITBlock(MachineInstr *MI,
ARMCC::CondCodes CC, ARMCC::CondCodes OCC,
RegisterSet &Defs, RegisterSet &Uses) {
if (!isCopy(MI))
return false;
// llvm models select's as two-address instructions. That means a copy
@ -180,10 +175,13 @@ Thumb2ITBlockPass::MoveCopyOutOfITBlock(MachineInstr *MI,
// Then peek at the next instruction to see if it's predicated on CC or OCC.
// If not, then there is nothing to be gained by moving the copy.
MachineBasicBlock::iterator I = MI; ++I;
MachineBasicBlock::iterator I = MI;
++I;
MachineBasicBlock::iterator E = MI->getParent()->end();
while (I != E && I->isDebugInstr())
++I;
if (I != E) {
unsigned NPredReg = 0;
ARMCC::CondCodes NCC = getITInstrPredicate(*I, NPredReg);
@ -193,12 +191,11 @@ Thumb2ITBlockPass::MoveCopyOutOfITBlock(MachineInstr *MI,
return false;
}
bool Thumb2ITBlockPass::InsertITInstructions(MachineBasicBlock &MBB) {
bool Thumb2ITBlock::InsertITInstructions(MachineBasicBlock &MBB) {
bool Modified = false;
SmallSet<unsigned, 4> Defs;
SmallSet<unsigned, 4> Uses;
RegisterSet Defs, Uses;
MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
while (MBBI != E) {
MachineInstr *MI = &*MBBI;
DebugLoc dl = MI->getDebugLoc();
@ -285,7 +282,7 @@ bool Thumb2ITBlockPass::InsertITInstructions(MachineBasicBlock &MBB) {
return Modified;
}
bool Thumb2ITBlockPass::runOnMachineFunction(MachineFunction &Fn) {
bool Thumb2ITBlock::runOnMachineFunction(MachineFunction &Fn) {
const ARMSubtarget &STI =
static_cast<const ARMSubtarget &>(Fn.getSubtarget());
if (!STI.isThumb2())
@ -299,11 +296,8 @@ bool Thumb2ITBlockPass::runOnMachineFunction(MachineFunction &Fn) {
return false;
bool Modified = false;
for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E; ) {
MachineBasicBlock &MBB = *MFI;
++MFI;
for (auto &MBB : Fn )
Modified |= InsertITInstructions(MBB);
}
if (Modified)
AFI->setHasITBlocks(true);
@ -313,9 +307,7 @@ bool Thumb2ITBlockPass::runOnMachineFunction(MachineFunction &Fn) {
/// createThumb2ITBlockPass - Returns an instance of the Thumb2 IT blocks
/// insertion pass.
FunctionPass *llvm::createThumb2ITBlockPass() {
return new Thumb2ITBlockPass();
}
FunctionPass *llvm::createThumb2ITBlockPass() { return new Thumb2ITBlock(); }
#undef DEBUG_TYPE
#define DEBUG_TYPE "arm-mve-vpt"
@ -396,14 +388,14 @@ bool MVEVPTBlock::InsertVPTBlocks(MachineBasicBlock &Block) {
MachineInstrBuilder MIBuilder =
BuildMI(Block, MBIter, dl, TII->get(ARM::t2VPST));
MachineInstr *LastITMI = MI;
MachineInstr *LastMI = MI;
MachineBasicBlock::iterator InsertPos = MIBuilder.getInstr();
// The mask value for the VPST instruction is T = 0b1000 = 8
MIBuilder.addImm(VPTMaskValue::T);
finalizeBundle(Block, InsertPos.getInstrIterator(),
++LastITMI->getIterator());
++LastMI->getIterator());
Modified = true;
LLVM_DEBUG(dbgs() << "VPT block created for: "; MI->dump(););