forked from OSchip/llvm-project
[X86][AVX2] Ensure on 32-bit targets that we broadcast f64 types not i64 (PR29101)
llvm-svn: 279622
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3c8cd3df5e
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@ -8733,6 +8733,13 @@ static SDValue lowerVectorShuffleAsBroadcast(const SDLoc &DL, MVT VT,
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V = DAG.getBitcast(SrcVT, V);
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}
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// 32-bit targets need to load i64 as a f64 and then bitcast the result.
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if (!Subtarget.is64Bit() && SrcVT == MVT::i64) {
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V = DAG.getBitcast(MVT::f64, V);
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unsigned NumBroadcastElts = BroadcastVT.getVectorNumElements();
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BroadcastVT = MVT::getVectorVT(MVT::f64, NumBroadcastElts);
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}
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return DAG.getBitcast(VT, DAG.getNode(Opcode, DL, BroadcastVT, V));
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}
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@ -232,6 +232,43 @@ entry:
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ret <4 x i64> %q3
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}
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define <8 x i16> @broadcast_mem_v4i16_v8i16(<4 x i16>* %ptr) {
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; X32-LABEL: broadcast_mem_v4i16_v8i16:
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; X32: ## BB#0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
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; X32-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
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; X32-NEXT: retl
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;
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; X64-LABEL: broadcast_mem_v4i16_v8i16:
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; X64: ## BB#0:
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; X64-NEXT: vpbroadcastq (%rdi), %xmm0
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; X64-NEXT: retq
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%load = load <4 x i16>, <4 x i16>* %ptr
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%shuf = shufflevector <4 x i16> %load, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
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ret <8 x i16> %shuf
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}
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define <16 x i16> @broadcast_mem_v4i16_v16i16(<4 x i16>* %ptr) {
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; X32-LABEL: broadcast_mem_v4i16_v16i16:
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; X32: ## BB#0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: vpmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
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; X32-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; X32-NEXT: vpbroadcastq %xmm0, %ymm0
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; X32-NEXT: retl
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;
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; X64-LABEL: broadcast_mem_v4i16_v16i16:
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; X64: ## BB#0:
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; X64-NEXT: vpmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
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; X64-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; X64-NEXT: vpbroadcastq %xmm0, %ymm0
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; X64-NEXT: retq
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%load = load <4 x i16>, <4 x i16>* %ptr
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%shuf = shufflevector <4 x i16> %load, <4 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
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ret <16 x i16> %shuf
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}
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; FIXME: Pointer adjusted broadcasts
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define <16 x i8> @load_splat_16i8_16i8_1111111111111111(<16 x i8>* %ptr) nounwind uwtable readnone ssp {
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@ -563,7 +600,7 @@ entry:
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define <8 x i32> @V111(<8 x i32> %in) nounwind uwtable readnone ssp {
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; X32-LABEL: V111:
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; X32: ## BB#0: ## %entry
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; X32-NEXT: vpbroadcastd LCPI27_0, %ymm1
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; X32-NEXT: vpbroadcastd LCPI29_0, %ymm1
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; X32-NEXT: vpaddd %ymm1, %ymm0, %ymm0
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; X32-NEXT: retl
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;
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@ -580,7 +617,7 @@ entry:
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define <8 x float> @V113(<8 x float> %in) nounwind uwtable readnone ssp {
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; X32-LABEL: V113:
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; X32: ## BB#0: ## %entry
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; X32-NEXT: vbroadcastss LCPI28_0, %ymm1
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; X32-NEXT: vbroadcastss LCPI30_0, %ymm1
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; X32-NEXT: vaddps %ymm1, %ymm0, %ymm0
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; X32-NEXT: retl
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;
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@ -597,7 +634,7 @@ entry:
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define <4 x float> @_e2(float* %ptr) nounwind uwtable readnone ssp {
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; X32-LABEL: _e2:
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; X32: ## BB#0:
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; X32-NEXT: vbroadcastss LCPI29_0, %xmm0
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; X32-NEXT: vbroadcastss LCPI31_0, %xmm0
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; X32-NEXT: retl
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;
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; X64-LABEL: _e2:
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@ -637,25 +674,25 @@ define void @crash() nounwind alwaysinline {
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; X32: ## BB#0: ## %WGLoopsEntry
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; X32-NEXT: xorl %eax, %eax
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; X32-NEXT: testb %al, %al
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; X32-NEXT: je LBB31_1
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; X32-NEXT: je LBB33_1
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; X32-NEXT: ## BB#2: ## %ret
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; X32-NEXT: retl
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; X32-NEXT: .p2align 4, 0x90
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; X32-NEXT: LBB31_1: ## %footer349VF
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; X32-NEXT: LBB33_1: ## %footer349VF
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; X32-NEXT: ## =>This Inner Loop Header: Depth=1
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; X32-NEXT: jmp LBB31_1
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; X32-NEXT: jmp LBB33_1
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;
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; X64-LABEL: crash:
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; X64: ## BB#0: ## %WGLoopsEntry
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: testb %al, %al
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; X64-NEXT: je LBB31_1
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; X64-NEXT: je LBB33_1
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; X64-NEXT: ## BB#2: ## %ret
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; X64-NEXT: retq
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; X64-NEXT: .p2align 4, 0x90
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; X64-NEXT: LBB31_1: ## %footer349VF
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; X64-NEXT: LBB33_1: ## %footer349VF
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; X64-NEXT: ## =>This Inner Loop Header: Depth=1
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; X64-NEXT: jmp LBB31_1
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; X64-NEXT: jmp LBB33_1
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WGLoopsEntry:
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br i1 undef, label %ret, label %footer329VF
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