forked from OSchip/llvm-project
Cleanup and include code selection for some frame index cases.
llvm-svn: 77622
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6352444635
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79c079b478
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@ -598,7 +598,7 @@ bool ARMDAGToDAGISel::SelectT2AddrModeImm12(SDValue Op, SDValue N,
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// Match simple R + imm12 operands.
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// Match frame index...
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if (N.getOpcode() != ISD::ADD) {
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if ((N.getOpcode() != ISD::ADD) && (N.getOpcode() != ISD::SUB)) {
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if (N.getOpcode() == ISD::FrameIndex) {
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int FI = cast<FrameIndexSDNode>(N)->getIndex();
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Base = CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy());
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@ -610,8 +610,15 @@ bool ARMDAGToDAGISel::SelectT2AddrModeImm12(SDValue Op, SDValue N,
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if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
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int RHSC = (int)RHS->getZExtValue();
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if (RHSC >= 0 && RHSC < 0x1000) { // 12 bits.
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if (N.getOpcode() == ISD::SUB)
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RHSC = -RHSC;
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if (RHSC >= 0 && RHSC < 0x1000) { // 12 bits (unsigned)
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Base = N.getOperand(0);
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if (Base.getOpcode() == ISD::FrameIndex) {
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int FI = cast<FrameIndexSDNode>(Base)->getIndex();
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Base = CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy());
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}
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OffImm = CurDAG->getTargetConstant(RHSC, MVT::i32);
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return true;
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}
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@ -622,20 +629,31 @@ bool ARMDAGToDAGISel::SelectT2AddrModeImm12(SDValue Op, SDValue N,
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bool ARMDAGToDAGISel::SelectT2AddrModeImm8(SDValue Op, SDValue N,
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SDValue &Base, SDValue &OffImm) {
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if ((N.getOpcode() == ISD::ADD) || (N.getOpcode() == ISD::SUB)) {
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if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
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int RHSC = (int)RHS->getSExtValue();
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if (N.getOpcode() == ISD::SUB)
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RHSC = -RHSC;
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// Match simple R - imm8 operands.
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if ((RHSC >= -255) && (RHSC <= 0)) { // 8 bits (always negative)
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Base = N.getOperand(0);
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OffImm = CurDAG->getTargetConstant(RHSC, MVT::i32);
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return true;
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// Match frame index...
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if ((N.getOpcode() != ISD::ADD) && (N.getOpcode() != ISD::SUB)) {
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if (N.getOpcode() == ISD::FrameIndex) {
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int FI = cast<FrameIndexSDNode>(N)->getIndex();
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Base = CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy());
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OffImm = CurDAG->getTargetConstant(0, MVT::i32);
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return true;
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}
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return false;
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}
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if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
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int RHSC = (int)RHS->getSExtValue();
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if (N.getOpcode() == ISD::SUB)
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RHSC = -RHSC;
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if ((RHSC >= -255) && (RHSC <= 0)) { // 8 bits (always negative)
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Base = N.getOperand(0);
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if (Base.getOpcode() == ISD::FrameIndex) {
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int FI = cast<FrameIndexSDNode>(Base)->getIndex();
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Base = CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy());
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}
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} else if (N.getOpcode() == ISD::SUB) {
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Base = N;
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OffImm = CurDAG->getTargetConstant(0, MVT::i32);
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OffImm = CurDAG->getTargetConstant(RHSC, MVT::i32);
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return true;
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}
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}
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@ -706,9 +724,24 @@ bool ARMDAGToDAGISel::SelectT2AddrModeSoReg(SDValue Op, SDValue N,
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return true;
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}
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// Leave (R +/- imm) for other address modes... unless they can't
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// handle them
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if (dyn_cast<ConstantSDNode>(N.getOperand(1)) != NULL) {
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SDValue OffImm;
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if (SelectT2AddrModeImm12(Op, N, Base, OffImm) ||
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SelectT2AddrModeImm8 (Op, N, Base, OffImm))
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return false;
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}
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// Thumb2 does not support (R - R) or (R - (R << [1,2,3])).
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if (N.getOpcode() != ISD::ADD)
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return false;
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if (N.getOpcode() == ISD::SUB) {
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Base = N;
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OffReg = CurDAG->getRegister(0, MVT::i32);
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ShImm = CurDAG->getTargetConstant(0, MVT::i32);
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return true;
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}
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assert(N.getOpcode() == ISD::ADD);
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// Look for (R + R) or (R + (R << [1,2,3])).
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unsigned ShAmt = 0;
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@ -736,10 +769,6 @@ bool ARMDAGToDAGISel::SelectT2AddrModeSoReg(SDValue Op, SDValue N,
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} else {
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ShOpcVal = ARM_AM::no_shift;
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}
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} else if (SelectT2AddrModeImm12(Op, N, Base, ShImm) ||
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SelectT2AddrModeImm8 (Op, N, Base, ShImm)) {
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// Don't match if it's possible to match to one of the r +/- imm cases.
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return false;
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}
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ShImm = CurDAG->getTargetConstant(ShAmt, MVT::i32);
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@ -8,7 +8,7 @@
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define hidden arm_apcscc i32 @atexit(void ()* %func) nounwind {
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entry:
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; CHECK: atexit:
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; CHECK: add.w r1, r1, pc
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; CHECK: add.w r0, r0, pc
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%r = alloca %struct.one_atexit_routine, align 4 ; <%struct.one_atexit_routine*> [#uses=3]
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%0 = getelementptr %struct.one_atexit_routine* %r, i32 0, i32 0, i32 0 ; <void ()**> [#uses=1]
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store void ()* %func, void ()** %0, align 4
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