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[X86] Autogenerate complete checks. NFC

This commit is contained in:
Craig Topper 2020-12-12 16:37:28 -08:00
parent 21de99d43c
commit 7977fee43c
1 changed files with 23 additions and 12 deletions
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35
llvm/test/CodeGen/X86/splat-const.ll
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@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mcpu=penryn | FileCheck %s --check-prefix=SSE ; RUN: llc < %s -mcpu=penryn | FileCheck %s --check-prefix=SSE
; RUN: llc < %s -mcpu=sandybridge | FileCheck %s --check-prefix=AVX ; RUN: llc < %s -mcpu=sandybridge | FileCheck %s --check-prefix=AVX
; RUN: llc < %s -mcpu=haswell | FileCheck %s --check-prefix=AVX2 ; RUN: llc < %s -mcpu=haswell | FileCheck %s --check-prefix=AVX2
@ -7,14 +8,19 @@ target triple = "x86_64-unknown-unknown"
define <4 x i32> @zero_vector() { define <4 x i32> @zero_vector() {
; SSE-LABEL: zero_vector: ; SSE-LABEL: zero_vector:
; SSE: xorps %xmm0, %xmm0 ; SSE: # %bb.0:
; SSE-NEXT: retq ; SSE-NEXT: xorps %xmm0, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: zero_vector: ; AVX-LABEL: zero_vector:
; AVX: vxorps %xmm0, %xmm0, %xmm0 ; AVX: # %bb.0:
; AVX-NEXT: retq ; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
; AVX-NEXT: retq
;
; AVX2-LABEL: zero_vector: ; AVX2-LABEL: zero_vector:
; AVX2: vxorps %xmm0, %xmm0, %xmm0 ; AVX2: # %bb.0:
; AVX2-NEXT: retq ; AVX2-NEXT: vxorps %xmm0, %xmm0, %xmm0
; AVX2-NEXT: retq
%zero = insertelement <4 x i32> undef, i32 0, i32 0 %zero = insertelement <4 x i32> undef, i32 0, i32 0
%splat = shufflevector <4 x i32> %zero, <4 x i32> undef, <4 x i32> zeroinitializer %splat = shufflevector <4 x i32> %zero, <4 x i32> undef, <4 x i32> zeroinitializer
ret <4 x i32> %splat ret <4 x i32> %splat
@ -26,14 +32,19 @@ define <4 x i32> @zero_vector() {
; However, this is not the current preferred lowering. ; However, this is not the current preferred lowering.
define <4 x i32> @const_vector() { define <4 x i32> @const_vector() {
; SSE-LABEL: const_vector: ; SSE-LABEL: const_vector:
; SSE: movaps {{.*}}, %xmm0 # xmm0 = [42,42,42,42] ; SSE: # %bb.0:
; SSE-NEXT: retq ; SSE-NEXT: movaps {{.*#+}} xmm0 = [42,42,42,42]
; SSE-NEXT: retq
;
; AVX-LABEL: const_vector: ; AVX-LABEL: const_vector:
; AVX: vmovaps {{.*}}, %xmm0 # xmm0 = [42,42,42,42] ; AVX: # %bb.0:
; AVX-NEXT: retq ; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [42,42,42,42]
; AVX-NEXT: retq
;
; AVX2-LABEL: const_vector: ; AVX2-LABEL: const_vector:
; AVX2: vbroadcastss {{[^%].*}}, %xmm0 ; AVX2: # %bb.0:
; AVX2-NEXT: retq ; AVX2-NEXT: vbroadcastss {{.*#+}} xmm0 = [42,42,42,42]
; AVX2-NEXT: retq
%const = insertelement <4 x i32> undef, i32 42, i32 0 %const = insertelement <4 x i32> undef, i32 42, i32 0
%splat = shufflevector <4 x i32> %const, <4 x i32> undef, <4 x i32> zeroinitializer %splat = shufflevector <4 x i32> %const, <4 x i32> undef, <4 x i32> zeroinitializer
ret <4 x i32> %splat ret <4 x i32> %splat