forked from OSchip/llvm-project
Revert "[mips] [IAS] Add support for BNE and BEQ with an immediate operand." (r239396).
It was breaking buildbots. llvm-svn: 239397
This commit is contained in:
Toma Tabacu
parent
5fa8fb5762
commit
7977cfd52a
|
|
@ -208,9 +208,6 @@ class MipsAsmParser : public MCTargetAsmParser {
|
||||||
bool expandLoadStoreMultiple(MCInst &Inst, SMLoc IDLoc,
|
bool expandLoadStoreMultiple(MCInst &Inst, SMLoc IDLoc,
|
||||||
SmallVectorImpl<MCInst> &Instructions);
|
SmallVectorImpl<MCInst> &Instructions);
|
||||||
|
|
||||||
bool expandBranchImm(MCInst &Inst, SMLoc IDLoc,
|
|
||||||
SmallVectorImpl<MCInst> &Instructions);
|
|
||||||
|
|
||||||
void createNop(bool hasShortDelaySlot, SMLoc IDLoc,
|
void createNop(bool hasShortDelaySlot, SMLoc IDLoc,
|
||||||
SmallVectorImpl<MCInst> &Instructions);
|
SmallVectorImpl<MCInst> &Instructions);
|
||||||
|
|
||||||
|
|
@ -1619,8 +1616,6 @@ bool MipsAsmParser::needsExpansion(MCInst &Inst) {
|
||||||
case Mips::SWM_MM:
|
case Mips::SWM_MM:
|
||||||
case Mips::JalOneReg:
|
case Mips::JalOneReg:
|
||||||
case Mips::JalTwoReg:
|
case Mips::JalTwoReg:
|
||||||
case Mips::BneImm:
|
|
||||||
case Mips::BeqImm:
|
|
||||||
return true;
|
return true;
|
||||||
default:
|
default:
|
||||||
return false;
|
return false;
|
||||||
|
|
@ -1647,9 +1642,6 @@ bool MipsAsmParser::expandInstruction(MCInst &Inst, SMLoc IDLoc,
|
||||||
case Mips::JalOneReg:
|
case Mips::JalOneReg:
|
||||||
case Mips::JalTwoReg:
|
case Mips::JalTwoReg:
|
||||||
return expandJalWithRegs(Inst, IDLoc, Instructions);
|
return expandJalWithRegs(Inst, IDLoc, Instructions);
|
||||||
case Mips::BneImm:
|
|
||||||
case Mips::BeqImm:
|
|
||||||
return expandBranchImm(Inst, IDLoc, Instructions);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -2040,59 +2032,6 @@ bool MipsAsmParser::expandUncondBranchMMPseudo(
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
|
|
||||||
bool MipsAsmParser::expandBranchImm(MCInst &Inst, SMLoc IDLoc,
|
|
||||||
SmallVectorImpl<MCInst> &Instructions) {
|
|
||||||
const MCOperand &DstRegOp = Inst.getOperand(0);
|
|
||||||
assert(DstRegOp.isReg() && "expected register operand kind");
|
|
||||||
|
|
||||||
const MCOperand &ImmOp = Inst.getOperand(1);
|
|
||||||
assert(ImmOp.isImm() && "expected immediate operand kind");
|
|
||||||
|
|
||||||
const MCOperand &MemOffsetOp = Inst.getOperand(2);
|
|
||||||
assert(MemOffsetOp.isImm() && "expected immediate operand kind");
|
|
||||||
|
|
||||||
unsigned OpCode = 0;
|
|
||||||
switch(Inst.getOpcode()) {
|
|
||||||
case Mips::BneImm:
|
|
||||||
OpCode = Mips::BNE;
|
|
||||||
break;
|
|
||||||
case Mips::BeqImm:
|
|
||||||
OpCode = Mips::BEQ;
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
llvm_unreachable("Unknown immediate branch pseudo-instruction.");
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
int64_t ImmValue = ImmOp.getImm();
|
|
||||||
if (ImmValue == 0) {
|
|
||||||
MCInst BranchInst;
|
|
||||||
BranchInst.setOpcode(OpCode);
|
|
||||||
BranchInst.addOperand(DstRegOp);
|
|
||||||
BranchInst.addOperand(MCOperand::createReg(Mips::ZERO));
|
|
||||||
BranchInst.addOperand(MemOffsetOp);
|
|
||||||
Instructions.push_back(BranchInst);
|
|
||||||
} else {
|
|
||||||
warnIfNoMacro(IDLoc);
|
|
||||||
|
|
||||||
unsigned ATReg = getATReg(IDLoc);
|
|
||||||
if (!ATReg)
|
|
||||||
return true;
|
|
||||||
|
|
||||||
if (loadImmediate(ImmValue, ATReg, Mips::NoRegister, !isGP64bit(), IDLoc,
|
|
||||||
Instructions))
|
|
||||||
return true;
|
|
||||||
|
|
||||||
MCInst BranchInst;
|
|
||||||
BranchInst.setOpcode(OpCode);
|
|
||||||
BranchInst.addOperand(DstRegOp);
|
|
||||||
BranchInst.addOperand(MCOperand::createReg(ATReg));
|
|
||||||
BranchInst.addOperand(MemOffsetOp);
|
|
||||||
Instructions.push_back(BranchInst);
|
|
||||||
}
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
|
|
||||||
void MipsAsmParser::expandMemInst(MCInst &Inst, SMLoc IDLoc,
|
void MipsAsmParser::expandMemInst(MCInst &Inst, SMLoc IDLoc,
|
||||||
SmallVectorImpl<MCInst> &Instructions,
|
SmallVectorImpl<MCInst> &Instructions,
|
||||||
bool isLoad, bool isImmOpnd) {
|
bool isLoad, bool isImmOpnd) {
|
||||||
|
|
|
||||||
|
|
@ -27,6 +27,8 @@ def uimm16_64 : Operand<i64> {
|
||||||
// Signed Operand
|
// Signed Operand
|
||||||
def simm10_64 : Operand<i64>;
|
def simm10_64 : Operand<i64>;
|
||||||
|
|
||||||
|
def imm64: Operand<i64>;
|
||||||
|
|
||||||
// Transformation Function - get Imm - 32.
|
// Transformation Function - get Imm - 32.
|
||||||
def Subtract32 : SDNodeXForm<imm, [{
|
def Subtract32 : SDNodeXForm<imm, [{
|
||||||
return getImm(N, (unsigned)N->getZExtValue() - 32);
|
return getImm(N, (unsigned)N->getZExtValue() - 32);
|
||||||
|
|
|
||||||
|
|
@ -22,7 +22,3 @@
|
||||||
# 64-BIT: ori $5, $5, %lo(symbol)
|
# 64-BIT: ori $5, $5, %lo(symbol)
|
||||||
dli $5, 1
|
dli $5, 1
|
||||||
# 32-BIT: :[[@LINE-1]]:3: error: instruction requires a 64-bit architecture
|
# 32-BIT: :[[@LINE-1]]:3: error: instruction requires a 64-bit architecture
|
||||||
bne $2, 0x100010001, 1332
|
|
||||||
# 32-BIT: :[[@LINE-1]]:3: error: instruction requires a 32-bit immediate
|
|
||||||
beq $2, 0x100010001, 1332
|
|
||||||
# 32-BIT: :[[@LINE-1]]:3: error: instruction requires a 32-bit immediate
|
|
||||||
|
|
|
||||||
|
|
@ -83,65 +83,3 @@
|
||||||
sdc1 $f0, symbol
|
sdc1 $f0, symbol
|
||||||
# CHECK: lui $1, %hi(symbol)
|
# CHECK: lui $1, %hi(symbol)
|
||||||
# CHECK: sdc1 $f0, %lo(symbol)($1)
|
# CHECK: sdc1 $f0, %lo(symbol)($1)
|
||||||
|
|
||||||
# Test BNE with an immediate as the 2nd operand.
|
|
||||||
bne $2, 0, 1332
|
|
||||||
# CHECK: bnez $2, 1332 # encoding: [0x4d,0x01,0x40,0x14]
|
|
||||||
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
|
|
||||||
|
|
||||||
bne $2, 123, 1332
|
|
||||||
# CHECK: ori $1, $zero, 123 # encoding: [0x7b,0x00,0x01,0x34]
|
|
||||||
# CHECK: bne $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x14]
|
|
||||||
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
|
|
||||||
|
|
||||||
bne $2, -2345, 1332
|
|
||||||
# CHECK: addiu $1, $zero, -2345 # encoding: [0xd7,0xf6,0x01,0x24]
|
|
||||||
# CHECK: bne $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x14]
|
|
||||||
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
|
|
||||||
|
|
||||||
bne $2, 65538, 1332
|
|
||||||
# CHECK: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
|
|
||||||
# CHECK: ori $1, $1, 2 # encoding: [0x02,0x00,0x21,0x34]
|
|
||||||
# CHECK: bne $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x14]
|
|
||||||
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
|
|
||||||
|
|
||||||
bne $2, ~7, 1332
|
|
||||||
# CHECK: addiu $1, $zero, -8 # encoding: [0xf8,0xff,0x01,0x24]
|
|
||||||
# CHECK: bne $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x14]
|
|
||||||
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
|
|
||||||
|
|
||||||
bne $2, 0x10000, 1332
|
|
||||||
# CHECK: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
|
|
||||||
# CHECK: bne $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x14]
|
|
||||||
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
|
|
||||||
|
|
||||||
# Test BEQ with an immediate as the 2nd operand.
|
|
||||||
beq $2, 0, 1332
|
|
||||||
# CHECK: beqz $2, 1332 # encoding: [0x4d,0x01,0x40,0x10]
|
|
||||||
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
|
|
||||||
|
|
||||||
beq $2, 123, 1332
|
|
||||||
# CHECK: ori $1, $zero, 123 # encoding: [0x7b,0x00,0x01,0x34]
|
|
||||||
# CHECK: beq $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x10]
|
|
||||||
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
|
|
||||||
|
|
||||||
beq $2, -2345, 1332
|
|
||||||
# CHECK: addiu $1, $zero, -2345 # encoding: [0xd7,0xf6,0x01,0x24]
|
|
||||||
# CHECK: beq $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x10]
|
|
||||||
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
|
|
||||||
|
|
||||||
beq $2, 65538, 1332
|
|
||||||
# CHECK: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
|
|
||||||
# CHECK: ori $1, $1, 2 # encoding: [0x02,0x00,0x21,0x34]
|
|
||||||
# CHECK: beq $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x10]
|
|
||||||
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
|
|
||||||
|
|
||||||
beq $2, ~7, 1332
|
|
||||||
# CHECK: addiu $1, $zero, -8 # encoding: [0xf8,0xff,0x01,0x24]
|
|
||||||
# CHECK: beq $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x10]
|
|
||||||
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
|
|
||||||
|
|
||||||
beq $2, 0x10000, 1332
|
|
||||||
# CHECK: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
|
|
||||||
# CHECK: beq $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x10]
|
|
||||||
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
|
|
||||||
|
|
|
||||||
|
|
@ -193,81 +193,3 @@
|
||||||
dli $9, 0x80000000
|
dli $9, 0x80000000
|
||||||
# CHECK: ori $9, $zero, 32768 # encoding: [0x00,0x80,0x09,0x34]
|
# CHECK: ori $9, $zero, 32768 # encoding: [0x00,0x80,0x09,0x34]
|
||||||
# CHECK: dsll $9, $9, 16 # encoding: [0x38,0x4c,0x09,0x00]
|
# CHECK: dsll $9, $9, 16 # encoding: [0x38,0x4c,0x09,0x00]
|
||||||
|
|
||||||
# Test bne with an immediate as the 2nd operand.
|
|
||||||
bne $2, 0x100010001, 1332
|
|
||||||
# CHECK: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
|
|
||||||
# CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34]
|
|
||||||
# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00]
|
|
||||||
# CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34]
|
|
||||||
# CHECK: bne $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x14]
|
|
||||||
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
|
|
||||||
|
|
||||||
bne $2, 0x1000100010001, 1332
|
|
||||||
# CHECK: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
|
|
||||||
# CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34]
|
|
||||||
# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00]
|
|
||||||
# CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34]
|
|
||||||
# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00]
|
|
||||||
# CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34]
|
|
||||||
# CHECK: bne $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x14]
|
|
||||||
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
|
|
||||||
|
|
||||||
bne $2, -0x100010001, 1332
|
|
||||||
# CHECK: lui $1, 65535 # encoding: [0xff,0xff,0x01,0x3c]
|
|
||||||
# CHECK: ori $1, $1, 65534 # encoding: [0xfe,0xff,0x21,0x34]
|
|
||||||
# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00]
|
|
||||||
# CHECK: ori $1, $1, 65534 # encoding: [0xfe,0xff,0x21,0x34]
|
|
||||||
# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00]
|
|
||||||
# CHECK: ori $1, $1, 65535 # encoding: [0xff,0xff,0x21,0x34]
|
|
||||||
# CHECK: bne $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x14]
|
|
||||||
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
|
|
||||||
|
|
||||||
bne $2, -0x1000100010001, 1332
|
|
||||||
# CHECK: lui $1, 65534 # encoding: [0xfe,0xff,0x01,0x3c]
|
|
||||||
# CHECK: ori $1, $1, 65534 # encoding: [0xfe,0xff,0x21,0x34]
|
|
||||||
# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00]
|
|
||||||
# CHECK: ori $1, $1, 65534 # encoding: [0xfe,0xff,0x21,0x34]
|
|
||||||
# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00]
|
|
||||||
# CHECK: ori $1, $1, 65535 # encoding: [0xff,0xff,0x21,0x34]
|
|
||||||
# CHECK: bne $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x14]
|
|
||||||
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
|
|
||||||
|
|
||||||
# Test beq with an immediate as the 2nd operand.
|
|
||||||
beq $2, 0x100010001, 1332
|
|
||||||
# CHECK: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
|
|
||||||
# CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34]
|
|
||||||
# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00]
|
|
||||||
# CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34]
|
|
||||||
# CHECK: beq $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x10]
|
|
||||||
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
|
|
||||||
|
|
||||||
beq $2, 0x1000100010001, 1332
|
|
||||||
# CHECK: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
|
|
||||||
# CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34]
|
|
||||||
# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00]
|
|
||||||
# CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34]
|
|
||||||
# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00]
|
|
||||||
# CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34]
|
|
||||||
# CHECK: beq $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x10]
|
|
||||||
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
|
|
||||||
|
|
||||||
beq $2, -0x100010001, 1332
|
|
||||||
# CHECK: lui $1, 65535 # encoding: [0xff,0xff,0x01,0x3c]
|
|
||||||
# CHECK: ori $1, $1, 65534 # encoding: [0xfe,0xff,0x21,0x34]
|
|
||||||
# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00]
|
|
||||||
# CHECK: ori $1, $1, 65534 # encoding: [0xfe,0xff,0x21,0x34]
|
|
||||||
# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00]
|
|
||||||
# CHECK: ori $1, $1, 65535 # encoding: [0xff,0xff,0x21,0x34]
|
|
||||||
# CHECK: beq $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x10]
|
|
||||||
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
|
|
||||||
|
|
||||||
beq $2, -0x1000100010001, 1332
|
|
||||||
# CHECK: lui $1, 65534 # encoding: [0xfe,0xff,0x01,0x3c]
|
|
||||||
# CHECK: ori $1, $1, 65534 # encoding: [0xfe,0xff,0x21,0x34]
|
|
||||||
# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00]
|
|
||||||
# CHECK: ori $1, $1, 65534 # encoding: [0xfe,0xff,0x21,0x34]
|
|
||||||
# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00]
|
|
||||||
# CHECK: ori $1, $1, 65535 # encoding: [0xff,0xff,0x21,0x34]
|
|
||||||
# CHECK: beq $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x10]
|
|
||||||
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
|
|
||||||
|
|
|
||||||
|
|
@ -15,11 +15,6 @@
|
||||||
jal $25
|
jal $25
|
||||||
jal $4, $25
|
jal $4, $25
|
||||||
|
|
||||||
bne $2, 0, 1332
|
|
||||||
bne $2, 1, 1332
|
|
||||||
beq $2, 0, 1332
|
|
||||||
beq $2, 1, 1332
|
|
||||||
|
|
||||||
add $4, $5, $6
|
add $4, $5, $6
|
||||||
|
|
||||||
.set noreorder
|
.set noreorder
|
||||||
|
|
@ -47,14 +42,5 @@
|
||||||
jal $4, $25
|
jal $4, $25
|
||||||
# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions
|
# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions
|
||||||
|
|
||||||
bne $2, 0, 1332
|
|
||||||
# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions
|
|
||||||
bne $2, 1, 1332
|
|
||||||
# CHECK: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions
|
|
||||||
beq $2, 0, 1332
|
|
||||||
# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions
|
|
||||||
beq $2, 1, 1332
|
|
||||||
# CHECK: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions
|
|
||||||
|
|
||||||
add $4, $5, $6
|
add $4, $5, $6
|
||||||
# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions
|
# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue