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[AArch64] add tests for fcvtl2; NFC

This commit is contained in:
Sanjay Patel 2019-12-14 11:08:36 -05:00
parent 687e98d294
commit 796e009c31
1 changed files with 49 additions and 0 deletions
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49
llvm/test/CodeGen/AArch64/arm64-vcvt_f.ll
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@ -38,6 +38,55 @@ define <2 x double> @test_vcvt_high_f64_f32(<4 x float> %x) nounwind readnone ss
ret <2 x double> %vcvt1.i
}
define <2 x double> @test_vcvt_high_f64_f32_bitcast(<4 x float> %x) nounwind readnone ssp {
; GENERIC-LABEL: test_vcvt_high_f64_f32_bitcast:
; GENERIC: // %bb.0:
; GENERIC-NEXT: ext.16b v0, v0, v0, #8
; GENERIC-NEXT: fcvtl v0.2d, v0.2s
; GENERIC-NEXT: ret
;
; FAST-LABEL: test_vcvt_high_f64_f32_bitcast:
; FAST: // %bb.0:
; FAST-NEXT: fcvtl2 v0.2d, v0.4s
; FAST-NEXT: ret
;
; GISEL-LABEL: test_vcvt_high_f64_f32_bitcast:
; GISEL: // %bb.0:
; GISEL-NEXT: ext.16b v0, v0, v0, #8
; GISEL-NEXT: fcvtl v0.2d, v0.2s
; GISEL-NEXT: ret
%bc1 = bitcast <4 x float> %x to <2 x double>
%ext = shufflevector <2 x double> %bc1, <2 x double> undef, <1 x i32> <i32 1>
%bc2 = bitcast <1 x double> %ext to <2 x float>
%r = fpext <2 x float> %bc2 to <2 x double>
ret <2 x double> %r
}
define <2 x double> @test_vcvt_high_i64_f32_bitcast(<2 x i64> %x) nounwind readnone ssp {
; GENERIC-LABEL: test_vcvt_high_i64_f32_bitcast:
; GENERIC: // %bb.0:
; GENERIC-NEXT: ext.16b v0, v0, v0, #8
; GENERIC-NEXT: fcvtl v0.2d, v0.2s
; GENERIC-NEXT: ret
;
; FAST-LABEL: test_vcvt_high_i64_f32_bitcast:
; FAST: // %bb.0:
; FAST-NEXT: ext.16b v0, v0, v0, #8
; FAST-NEXT: // kill: def $d0 killed $d0 killed $q0
; FAST-NEXT: fcvtl v0.2d, v0.2s
; FAST-NEXT: ret
;
; GISEL-LABEL: test_vcvt_high_i64_f32_bitcast:
; GISEL: // %bb.0:
; GISEL-NEXT: ext.16b v0, v0, v0, #8
; GISEL-NEXT: fcvtl v0.2d, v0.2s
; GISEL-NEXT: ret
%ext = shufflevector <2 x i64> %x, <2 x i64> undef, <1 x i32> <i32 1>
%bc2 = bitcast <1 x i64> %ext to <2 x float>
%r = fpext <2 x float> %bc2 to <2 x double>
ret <2 x double> %r
}
; FALLBACK-NOT: remark{{.*}}G_FPEXT{{.*}}(in function: test_vcvt_f32_f64)
; FALLBACK-NOT: remark{{.*}}fpext{{.*}}(in function: test_vcvt_f32_f64)
define <2 x float> @test_vcvt_f32_f64(<2 x double> %v) nounwind readnone ssp {